e4f5b93986
Instead of using pci_set_irq, store the irq in the device state and use it explicitly so variants having different interrupt handling can use their own. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <b39066e03c8731f4197d50bc79b403f797599999.1635161629.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
95 lines
3.0 KiB
C
95 lines
3.0 KiB
C
/*
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* USB UHCI controller emulation
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*
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* Copyright (c) 2005 Fabrice Bellard
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*
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* Copyright (c) 2008 Max Krasnyansky
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* Magor rewrite of the UHCI data structures parser and frame processor
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* Support for fully async operation and multiple outstanding transactions
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_USB_HCD_UHCI_H
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#define HW_USB_HCD_UHCI_H
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#include "exec/memory.h"
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#include "qemu/timer.h"
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#include "hw/pci/pci.h"
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#include "hw/usb.h"
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typedef struct UHCIQueue UHCIQueue;
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#define NB_PORTS 2
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typedef struct UHCIPort {
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USBPort port;
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uint16_t ctrl;
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} UHCIPort;
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typedef struct UHCIState {
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PCIDevice dev;
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MemoryRegion io_bar;
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USBBus bus; /* Note unused when we're a companion controller */
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uint16_t cmd; /* cmd register */
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uint16_t status;
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uint16_t intr; /* interrupt enable register */
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uint16_t frnum; /* frame number */
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uint32_t fl_base_addr; /* frame list base address */
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uint8_t sof_timing;
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uint8_t status2; /* bit 0 and 1 are used to generate UHCI_STS_USBINT */
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int64_t expire_time;
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QEMUTimer *frame_timer;
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QEMUBH *bh;
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uint32_t frame_bytes;
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uint32_t frame_bandwidth;
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bool completions_only;
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UHCIPort ports[NB_PORTS];
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qemu_irq irq;
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/* Interrupts that should be raised at the end of the current frame. */
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uint32_t pending_int_mask;
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/* Active packets */
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QTAILQ_HEAD(, UHCIQueue) queues;
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uint8_t num_ports_vmstate;
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/* Properties */
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char *masterbus;
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uint32_t firstport;
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uint32_t maxframes;
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} UHCIState;
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#define TYPE_UHCI "pci-uhci-usb"
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DECLARE_INSTANCE_CHECKER(UHCIState, UHCI, TYPE_UHCI)
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typedef struct UHCIInfo {
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const char *name;
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uint16_t vendor_id;
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uint16_t device_id;
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uint8_t revision;
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uint8_t irq_pin;
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void (*realize)(PCIDevice *dev, Error **errp);
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bool unplug;
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bool notuser; /* disallow user_creatable */
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} UHCIInfo;
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void uhci_data_class_init(ObjectClass *klass, void *data);
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void usb_uhci_common_realize(PCIDevice *dev, Error **errp);
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#endif
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