97ba42230b
Microchip PolarFire SoC integrates a DMA engine that supports: * Independent concurrent DMA transfers using 4 DMA channels * Generation of interrupts on various conditions during execution which is actually an IP reused from the SiFive FU540 chip. This creates a model to support both polling and interrupt modes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-10-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
17 lines
1.1 KiB
Meson
17 lines
1.1 KiB
Meson
softmmu_ss.add(when: 'CONFIG_PUV3', if_true: files('puv3_dma.c'))
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softmmu_ss.add(when: 'CONFIG_RC4030', if_true: files('rc4030.c'))
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softmmu_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
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softmmu_ss.add(when: 'CONFIG_PL330', if_true: files('pl330.c'))
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softmmu_ss.add(when: 'CONFIG_I82374', if_true: files('i82374.c'))
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softmmu_ss.add(when: 'CONFIG_I8257', if_true: files('i8257.c'))
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softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axidma.c'))
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softmmu_ss.add(when: 'CONFIG_ZYNQ_DEVCFG', if_true: files('xlnx-zynq-devcfg.c'))
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softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
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softmmu_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
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softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
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softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zdma.c'))
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softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
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softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
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softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
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softmmu_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c'))
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