Peter Maydell
f14ad81eed
MIPS patches queue
- Fix CP0 cycle counter timing
- Fix VMState of gt64120 IRQs
- Long due PIIX4 QOM cleanups
- ISA IRQ QOM'ification / cleanups
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmInou4ACgkQ4+MsLN6t
wN4GWA/+LzYo63IKZM77NJQWhXxp3ypwS9e8zfF0gbPQWMjXnBYr78dxWemTx4IL
bKa7JXlKdEqgvt+3MwwmxP6lYbTdxRPnZ5ErarDYDVE3OFKVoFYfWKjqcGbCPYgm
gERxScsRa/CeSQYW8F04Qme7JE9m4oEbyRbxCrK70VQhEJd1fDYSvOmkqpHfKy/4
GzaYGE0xkpc7UnMDx7WQ5+22HYan1GS7EsXPkew+ibVVs2rlFWKZTK76TUyvpmdZ
vW/gZKOLiJykzGT1JCDCEu6pAqFvU5vCZRj83+NSkwaJOFPpSEKsI/u+NTNPqfhj
9NSZ1f2C6gnCOVq3R3PxkgUZe2IZK1xP2Gn3A65IGmsuu1DoVjif8HgvuBFZfTUW
XRx2N5KLAWU1LA1UcE7tEryeazZxF9BlsDpspJtjBzcnixLwYz0MqAK64qOxnlzk
NTYbkgEwjVxjpzSInRbchUM4ZWjkt2niSVwiwCG+hDLocDT9PZzGM+WhhDxTdLc+
9gWQkWw9JOeLcDSJtvlrrcO/GGF4xG2fBkNveQ2RIaVnHVlN4Z7Kkne75sqzfTdx
ZxOKPqP5PcN0e2Wwh+mcEx6LVncZbIJ1mds77xRv7dL6Z15BcvyCpU3ZrMqGoyrp
prr5I/knb80A6WHd8jTiFAf7a+lEbx9duuXkt1EuOoa0Im2EvWQ=
=+5Rn
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/philmd/tags/mips-20220308' into staging
MIPS patches queue
- Fix CP0 cycle counter timing
- Fix VMState of gt64120 IRQs
- Long due PIIX4 QOM cleanups
- ISA IRQ QOM'ification / cleanups
# gpg: Signature made Tue 08 Mar 2022 18:39:42 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd/tags/mips-20220308:
tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag
hw/isa: Inline and remove one-line isa_init_irq()
hw/isa: Drop unused attributes from ISADevice
hw/isa/isa-bus: Remove isabus_dev_print()
hw/input/pckbd: QOM'ify IRQ numbers
hw/rtc/m48t59-isa: QOM'ify IRQ number
hw/rtc/mc146818rtc: QOM'ify IRQ number
hw/mips/gt64xxx_pci: Resolve gt64120_register()
hw/isa/piix4: Replace some magic IRQ constants
hw/isa/piix4: Resolve global instance variable
hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()
hw/isa/piix4: Resolve redundant i8259[] attribute
malta: Move PCI interrupt handling from gt64xxx_pci to piix4
hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration
target/mips: Remove duplicated MIPSCPU::cp0_count_rate
target/mips: Fix cycle counter timing calculations
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09 09:13:39 +00:00
..
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