qemu/target-mips
Meador Inge 94159135cb target-mips: Enable access to required RDHWR hardware registers
While running in the usermode emulator all of the required*
MIPS32r2 RDHWR hardware registers should be accessible (the
Linux kernel enables access to these same registers).  Note
that these registers are still enabled when the MIPS ISA is
not release 2.  This is OK since the Linux kernel emulates
access to them when they are not available in hardware.

* There is also the ULR register which is only recommended
  for full release 2 compliance.  Incidentally, accessing
  this register in the current implementation works fine
  without flipping its access bit.

Signed-off-by: Meador Inge <meadori@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-08-23 17:21:05 +02:00
..
cpu-qom.h target-mips: QOM'ify CPU 2012-04-30 11:32:13 +02:00
cpu.c target-mips: Start QOM'ifying CPU init 2012-04-30 11:32:13 +02:00
cpu.h Kill off cpu_state_reset() 2012-06-04 23:00:45 +02:00
helper.c target-mips: Use cpu_reset() in do_interrupt() 2012-06-04 23:00:43 +02:00
helper.h target-mips: Add compiler attribute to some functions which don't return 2012-03-24 13:02:43 +00:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs build: move other target-*/ objects to nested Makefile.objs 2012-06-07 09:21:11 +02:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c target-mips: Remove unused inline function 2012-05-03 07:04:48 +02:00
TODO Replace Qemu by QEMU in internal documentation 2012-04-07 13:58:25 +00:00
translate_init.c mips: Default to using one VPE and one TC. 2011-09-06 11:09:39 +02:00
translate.c target-mips: Enable access to required RDHWR hardware registers 2012-08-23 17:21:05 +02:00