qemu/target-cris
Peter Maydell ec53b45bcd exec.c: Drop TARGET_HAS_ICE define and checks
The TARGET_HAS_ICE #define is intended to indicate whether a target-*
guest CPU implementation supports the breakpoint handling. However,
all our guest CPUs have that support (the only two which do not
define TARGET_HAS_ICE are unicore32 and openrisc, and in both those
cases the bp support is present and the lack of the #define is just
a bug). So remove the #define entirely: all new guest CPU support
should include breakpoint handling as part of the basic implementation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
2015-01-20 15:19:32 +00:00
..
cpu-qom.h target-cris: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:21 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h exec.c: Drop TARGET_HAS_ICE define and checks 2015-01-20 15:19:32 +00:00
crisv10-decode.h
crisv32-decode.h janitor: add guards to headers 2012-12-19 08:31:31 +01:00
gdbstub.c target-cris: Factor out CPUClass::gdb_read_register() hook for v10 2013-07-27 00:04:17 +02:00
helper.c qemu-log: add log category for MMU info 2014-12-16 18:43:19 +00:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
machine.c
Makefile.objs cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
mmu.c cputlb: Change tlb_flush_page() argument to CPUState 2014-03-13 19:52:47 +01:00
mmu.h
op_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
opcode-cris.h
translate_v10.c target-cris/translate.c: Remove t_gen_mov_TN_reg and t_gen_mov_reg_TN 2014-06-09 01:04:44 +02:00
translate.c gen-icount: check cflags instead of use_icount global 2015-01-03 09:22:12 +01:00