qemu/hw/mips
BALATON Zoltan 911629e6d3 vt82c686: Fix SMBus IO base and configuration registers
The base address of the SMBus io ports and its enabled status is set
by registers in the PCI config space but this was not correctly
emulated. Instead the SMBus registers were mapped on realize to the
base address set by a property to the address expected by fuloong2e
firmware.

Fix the base and config register handling to more closely model
hardware which allows to remove the property and allows the guest to
control this mapping. Do all this in reset instead of realize so it's
correctly updated on reset.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <f2ca2ad5f08ba8cee07afd9d67b4e75cda21db09.1610223397.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21 19:42:34 +01:00
..
bootloader.c hw/mips: Add a bootloader helper 2021-02-21 18:41:04 +01:00
boston.c hw/mips/boston: Use bootloader helper to set GCRs 2021-02-21 18:41:46 +01:00
cps.c target/mips: Introduce ase_mt_available() helper 2020-12-13 20:26:02 +01:00
fuloong2e.c vt82c686: Fix SMBus IO base and configuration registers 2021-02-21 19:42:34 +01:00
fw_cfg.c hw/mips: Implement fw_cfg_arch_key_name() 2021-01-04 23:32:27 +01:00
fw_cfg.h hw/mips: Implement fw_cfg_arch_key_name() 2021-01-04 23:32:27 +01:00
gt64xxx_pci.c hw: Use the PCI_SLOT() macro from 'hw/pci/pci.h' 2021-01-04 23:24:44 +01:00
jazz.c cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
Kconfig hw/mips: Add Loongson-3 machine support 2021-01-04 23:36:03 +01:00
loongson3_bootp.c hw/mips: Add Loongson-3 boot parameter helpers 2021-01-04 23:33:38 +01:00
loongson3_bootp.h hw/mips: loongson3: Drop 'struct MemmapEntry' 2021-02-21 14:22:09 +01:00
loongson3_virt.c hw/mips: loongson3: Drop 'struct MemmapEntry' 2021-02-21 14:22:09 +01:00
malta.c hw/mips: Use address translation helper to handle ENVP_ADDR 2021-01-04 23:36:03 +01:00
meson.build hw/mips: Add a bootloader helper 2021-02-21 18:41:04 +01:00
mips_int.c hw/mips: Add CPU IRQ3 delivery for KVM 2020-06-01 13:28:21 +02:00
mipssim.c hw/mips: Make bootloader addresses unsigned 2021-01-04 23:36:03 +01:00
trace-events trace-events: Fix attribution of trace points to source 2020-09-09 17:17:58 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00