edb5092c24
Previous realization doesn't consider flags in the status register. Add DS and INTR bits of HST_STS register set after transaction execution. Update bits resetting in HST_STS register. Update error processing: if DEV_ERR bit set transaction isn't execution. Signed-off-by: MRatnikov <m.o.ratnikov@gmail.com> Message-id: 1373230982-9190-1-git-send-email-m.o.ratnikov@gmail.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> |
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bitbang_i2c.c | ||
bitbang_i2c.h | ||
core.c | ||
exynos4210_i2c.c | ||
Makefile.objs | ||
omap_i2c.c | ||
pm_smbus.c | ||
smbus_eeprom.c | ||
smbus_ich9.c | ||
smbus.c | ||
versatile_i2c.c |