Max Filippov 908c67fca4 target-xtensa: check register window inline ...

This lowers time spent in helper_window_check as reported by perf top
from ~8% to ~0.15% accelerating register-intensive tests by ~20%.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

2013-07-29 18:35:45 +04:00

..

core-dc232b

target-xtensa: add dc232b core

2011-10-16 10:40:02 +00:00

core-dc233c

target-xtensa: add dc233c core

2012-04-15 17:43:16 +00:00

core-fsf

target-xtensa: add fsf core

2011-10-16 10:40:16 +00:00

core-dc232b.c

misc: move include files to include/qemu/

2012-12-19 08:32:39 +01:00

core-dc233c.c

misc: move include files to include/qemu/

2012-12-19 08:32:39 +01:00

core-fsf.c

misc: move include files to include/qemu/

2012-12-19 08:32:39 +01:00

cpu-qom.h

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

cpu.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

cpu.h

target-xtensa: avoid double-stopping at breakpoints

2013-07-29 18:35:45 +04:00

gdbstub.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

helper.c

cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs

2013-07-26 23:23:54 +02:00

helper.h

exec: move include files to include/exec/

2012-12-19 08:31:31 +01:00

Makefile.objs

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

op_helper.c

target-xtensa: avoid double-stopping at breakpoints

2013-07-29 18:35:45 +04:00

overlay_tool.h

target-xtensa: implement MISC SR

2012-12-08 18:48:26 +00:00

translate.c

target-xtensa: check register window inline

2013-07-29 18:35:45 +04:00

xtensa-semi.c

exec: Change cpu_memory_rw_debug() argument to CPUState

2013-07-23 02:41:33 +02:00