James Hogan 8fffc64696 target/mips: Decode microMIPS EVA load & store instructions ... Implement decoding of microMIPS EVA load and store instruction groups in the POOL31C pool. These use the same gen_ld(), gen_st(), gen_st_cond() helpers as the MIPS32 decoding, passing the equivalent MIPS32 opcodes as opc. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>		2017-07-20 22:42:26 +01:00
..
cpu-qom.h
cpu.c	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
cpu.h	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
dsp_helper.c
gdbstub.c
helper.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
helper.h	target-mips: Use clz opcode	2017-01-10 08:06:11 -08:00
kvm_mips.h
kvm.c	vcpu_dirty: share the same field in CPUState for all accelerators	2017-07-04 14:30:03 +02:00
lmi_helper.c
machine.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
Makefile.objs
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
TODO
trace-events	target-mips: replace few LOG_DISAS() with trace points	2017-03-20 11:06:32 +00:00
translate_init.c	target/mips: Add CP0_Ebase.WG (write gate) support	2017-07-20 22:42:26 +01:00
translate.c	target/mips: Decode microMIPS EVA load & store instructions	2017-07-20 22:42:26 +01:00