dc3b89ef87
The Xilinx ZynqMP SoC and EP108 board supports three memory regions: - A 2GB region starting at 0 - A 32GB region starting at 32GB - A 256GB region starting at 768GB This patch adds support for the first two memory regions, which is automatically created based on the size specified by the QEMU memory command line argument. On hardware the physical memory region is one continuous region, it is then mapped into the three different regions by the DDRC. As we don't model the DDRC this is done at startup by QEMU. The board creates the memory region and then passes that memory region to the SoC. The SoC then maps the memory regions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: a1e47db941d65733724a300fcd98b74fbeeaaf22.1452637205.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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allwinner-a10.h | ||
arm.h | ||
digic.h | ||
exynos4210.h | ||
fdt.h | ||
fsl-imx25.h | ||
fsl-imx31.h | ||
linux-boot-if.h | ||
omap.h | ||
primecell.h | ||
pxa.h | ||
sharpsl.h | ||
soc_dma.h | ||
stm32f205_soc.h | ||
sysbus-fdt.h | ||
virt-acpi-build.h | ||
virt.h | ||
xlnx-zynqmp.h |