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8f0a4b6a9b
qemu/target/ppc
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Matheus Ferst 8f0a4b6a9b target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 
Additionally, REQUIRE_64BIT when L=1 to match what is specified in The
Programming Environments Manual:

"For 32-bit implementations, the L field must be cleared, otherwise the
instruction form is invalid."

Some CPUs are known to deviate from this specification by ignoring the
L bit [1]. The stricter behavior, however, can help users that test
software with qemu, making it more likely to detect bugs that would
otherwise be silent.

If deemed necessary, a future patch can adapt this behavior based on
the specific CPU model.

[1] The 601 manual is the only one I've found that explicitly states
that the L bit is ignored, but we also observe this behavior in a 7447A
v1.2.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-15-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[dwg: Corrected whitespace error]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-06-03 18:10:31 +10:00
..
translate target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 2021-06-03 18:10:31 +10:00
arch_dump.c target/ppc: created ppc_{store,get}_vscr for generic vscr usage 2021-05-19 10:30:28 +10:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu_init.c target/ppc: removed all mentions to PPC_DUMP_CPU 2021-06-03 18:10:31 +10:00
cpu-models.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.h powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h target/ppc: Add POWER10 exception model 2021-05-04 13:12:46 +10:00
cpu.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
cpu.h target/ppc: Add infrastructure for prefixed insns 2021-06-03 18:10:31 +10:00
dfp_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
excp_helper.c target/ppc: powerpc_excp: Consolidade TLB miss code 2021-06-03 18:10:31 +10:00
fpu_helper.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
gdbstub.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
helper_regs.c target/ppc: Validate hflags with CONFIG_DEBUG_TCG 2021-05-04 11:41:25 +10:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
helper.h target/ppc: Implement cfuged instruction 2021-06-03 18:10:31 +10:00
insn32.decode target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 2021-06-03 18:10:31 +10:00
insn64.decode target/ppc: Implement prefixed integer store instructions 2021-06-03 18:10:31 +10:00
int_helper.c target/ppc: Implement cfuged instruction 2021-06-03 18:10:31 +10:00
internal.h target/ppc: removed all mentions to PPC_DUMP_CPU 2021-06-03 18:10:31 +10:00
kvm_ppc.h spapr: Add PEF based confidential guest support 2021-02-08 16:57:38 +11:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc/kvm: Cache timebase frequency 2021-03-31 11:10:50 +11:00
machine.c target/ppc: updated vscr manipulation in machine.c 2021-05-19 10:30:28 +10:00
mem_helper.c target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
meson.build target/ppc: Add infrastructure for prefixed insns 2021-06-03 18:10:31 +10:00
mfrom_table_gen.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
mfrom_table.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
misc_helper.c target/ppc: fold ppc_store_ptcr into it's only caller 2021-06-03 13:22:06 +10:00
mmu_helper.c target/ppc: added ifdefs around TCG-only code 2021-06-03 13:22:06 +10:00
mmu-book3s-v3.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
mmu-book3s-v3.h powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
mmu-hash32.c target/ppc: removed unnecessary inclusion of helper-proto.h 2021-06-03 13:22:06 +10:00
mmu-hash32.h target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
mmu-hash64.c target/ppc: added ifdefs around TCG-only code 2021-06-03 13:22:06 +10:00
mmu-hash64.h target/ppc: moved ppc_store_lpcr to misc_helper.c 2021-05-19 10:30:28 +10:00
mmu-radix64.c target/ppc: removed unnecessary inclusion of helper-proto.h 2021-06-03 13:22:06 +10:00
mmu-radix64.h target/ppc: Pass const pointer to ppc_radix64_get_prot_amr() 2020-05-27 15:29:36 +10:00
monitor.c hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
spr_tcg.h target/ppc: isolated cpu init from translation logic 2021-05-19 10:30:28 +10:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 2021-06-03 18:10:31 +10:00
user_only_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00