mirror of https://gitlab.com/qemu-project/qemu
8f09231631
The PBA bridge unit (Power Bus Access) connects the OCC (On Chip Controller) to the Power bus and System Memory. The PBA is used to gather sensor data, for power management, for sleep states, for initial boot, among other things. The PBA logic provides a set of four registers PowerBus Access Base Address Registers (PBABAR0..3) which map the OCC address space to the PowerBus space. These registers are setup by the initial FW and define the PowerBus Range of system memory that can be accessed by PBA. The current modeling of the PBABAR registers is done under the common XSCOM handlers. We introduce a specific XSCOM regions for these registers and fix : - BAR sizes and BAR masks - The mapping of the OCC common area. It is common to all chips and should be mapped once. We will address per-OCC area in the next change. - OCC common area is in BAR 3 on P8 Inspired by previous work of Balamuruhan S <bala24@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191211082912.2625-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| fdt.h | ||
| mac_dbdma.h | ||
| openpic.h | ||
| openpic_kvm.h | ||
| pnv.h | ||
| pnv_core.h | ||
| pnv_homer.h | ||
| pnv_lpc.h | ||
| pnv_occ.h | ||
| pnv_pnor.h | ||
| pnv_psi.h | ||
| pnv_xive.h | ||
| pnv_xscom.h | ||
| ppc.h | ||
| ppc4xx.h | ||
| ppc_e500.h | ||
| spapr.h | ||
| spapr_cpu_core.h | ||
| spapr_drc.h | ||
| spapr_irq.h | ||
| spapr_ovec.h | ||
| spapr_rtas.h | ||
| spapr_tpm_proxy.h | ||
| spapr_vio.h | ||
| spapr_xive.h | ||
| xics.h | ||
| xics_spapr.h | ||
| xive.h | ||
| xive_regs.h | ||