1e943c586a
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two identical PWM modules. Each module contains 4 PWM entries. Each PWM has two outputs: frequency and duty_cycle. Both are computed using inputs from software side. This module does not model detail pulse signals since it is expensive. It also does not model interrupts and watchdogs that are dependant on the detail models. The interfaces for these are left in the module so that anyone in need for these functionalities can implement on their own. The user can read the duty cycle and frequency using qom-get command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-5-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
/*
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* Nuvoton NPCM7xx PWM Module
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*
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* Copyright 2020 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef NPCM7XX_PWM_H
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#define NPCM7XX_PWM_H
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#include "hw/clock.h"
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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/* Each PWM module holds 4 PWM channels. */
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#define NPCM7XX_PWM_PER_MODULE 4
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/*
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* Number of registers in one pwm module. Don't change this without increasing
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* the version_id in vmstate.
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*/
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#define NPCM7XX_PWM_NR_REGS (0x54 / sizeof(uint32_t))
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/*
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* The maximum duty values. Each duty unit represents 1/NPCM7XX_PWM_MAX_DUTY
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* cycles. For example, if NPCM7XX_PWM_MAX_DUTY=1,000,000 and a PWM has a duty
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* value of 100,000 the duty cycle for that PWM is 10%.
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*/
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#define NPCM7XX_PWM_MAX_DUTY 1000000
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typedef struct NPCM7xxPWMState NPCM7xxPWMState;
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/**
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* struct NPCM7xxPWM - The state of a single PWM channel.
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* @module: The PWM module that contains this channel.
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* @irq: GIC interrupt line to fire on expiration if enabled.
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* @running: Whether this PWM channel is generating output.
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* @inverted: Whether this PWM channel is inverted.
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* @index: The index of this PWM channel.
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* @cnr: The counter register.
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* @cmr: The comparator register.
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* @pdr: The data register.
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* @pwdr: The watchdog register.
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* @freq: The frequency of this PWM channel.
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* @duty: The duty cycle of this PWM channel. One unit represents
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* 1/NPCM7XX_MAX_DUTY cycles.
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*/
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typedef struct NPCM7xxPWM {
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NPCM7xxPWMState *module;
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qemu_irq irq;
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bool running;
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bool inverted;
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uint8_t index;
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uint32_t cnr;
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uint32_t cmr;
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uint32_t pdr;
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uint32_t pwdr;
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uint32_t freq;
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uint32_t duty;
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} NPCM7xxPWM;
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/**
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* struct NPCM7xxPWMState - Pulse Width Modulation device state.
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* @parent: System bus device.
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* @iomem: Memory region through which registers are accessed.
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* @clock: The PWM clock.
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* @pwm: The PWM channels owned by this module.
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* @ppr: The prescaler register.
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* @csr: The clock selector register.
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* @pcr: The control register.
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* @pier: The interrupt enable register.
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* @piir: The interrupt indication register.
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*/
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struct NPCM7xxPWMState {
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SysBusDevice parent;
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MemoryRegion iomem;
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Clock *clock;
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NPCM7xxPWM pwm[NPCM7XX_PWM_PER_MODULE];
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uint32_t ppr;
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uint32_t csr;
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uint32_t pcr;
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uint32_t pier;
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uint32_t piir;
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};
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#define TYPE_NPCM7XX_PWM "npcm7xx-pwm"
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#define NPCM7XX_PWM(obj) \
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OBJECT_CHECK(NPCM7xxPWMState, (obj), TYPE_NPCM7XX_PWM)
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#endif /* NPCM7XX_PWM_H */
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