qemu/target
Peter Maydell 8e228c9e4b target/arm: Implement HSTR.TJDBX
In v7A, the HSTR register has a TJDBX bit which traps NS EL0/EL1
access to the JOSCR and JMCR trivial Jazelle registers, and also BXJ.
Implement these traps. In v8A this HSTR bit doesn't exist, so don't
trap for v8A CPUs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210816180305.20137-3-peter.maydell@linaro.org
2021-08-26 17:02:01 +01:00
..
alpha accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
arm target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
avr accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
cris accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
hexagon The Hexagon target was silently failing the SIGSEGV test because 2021-07-26 13:36:51 +01:00
hppa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
i386 i386/cpu: Remove AVX_VNNI feature from Cooperlake cpu model 2021-08-25 12:36:49 -04:00
m68k accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
microblaze accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
mips target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() 2021-08-25 13:02:14 +02:00
nios2 target/nios2: Mark raise_exception() as noreturn 2021-07-30 08:23:12 -10:00
openrisc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
ppc arch_init.h: Don't include arch_init.h unnecessarily 2021-08-26 17:02:00 +01:00
riscv accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
rx accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
s390x arch_init.h: Don't include arch_init.h unnecessarily 2021-08-26 17:02:00 +01:00
sh4 accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
sparc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
tricore accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
xtensa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00