qemu/target
Peter Maydell 8cc2246caa target/arm: Log M-profile vector table accesses
Currently the CPU_LOG_INT logging misses some useful information
about loads from the vector table.  Add logging where we load vector
table entries.  This is particularly helpful for cases where the user
has accidentally not put a vector table in their image at all, which
can result in confusing guest crashes at startup.

Here's an example of the new logging for a case where
the vector table contains garbage:

Loaded reset SP 0x0 PC 0x0 from vector table
Loaded reset SP 0xd008f8df PC 0xf000bf00 from vector table
Taking exception 3 [Prefetch Abort] on CPU 0
...with CFSR.IACCVIOL
...BusFault with BFSR.STKERR
...taking pending nonsecure exception 3
...loading from element 3 of non-secure vector table at 0xc
...loaded new PC 0x20000558
----------------
IN:
0x20000558:  08000079  stmdaeq  r0, {r0, r3, r4, r5, r6}

(The double reset logging is the result of our long-standing
"CPUs all get reset twice" weirdness; it looks a bit ugly
but it'll go away if we ever fix that :-))

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20220315204306.2797684-2-peter.maydell@linaro.org
2022-03-18 11:08:59 +00:00
..
alpha target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
arm target/arm: Log M-profile vector table accesses 2022-03-18 11:08:59 +00:00
avr target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
cris target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
hexagon target/hexagon: remove unused variable 2022-03-12 09:14:22 -08:00
hppa target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
i386 Darwin-based host patches 2022-03-15 18:58:41 +00:00
m68k target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
microblaze target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
mips MIPS patches queue 2022-03-09 09:13:39 +00:00
nios2 target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
openrisc target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
ppc target/ppc: fix xxspltw for big endian hosts 2022-03-14 15:57:17 +01:00
riscv target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
rx target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
s390x s390x/tcg: Fix BRCL with a large negative offset 2022-03-16 08:43:10 +01:00
sh4 target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
sparc target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
tricore target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
xtensa target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00