qemu/include/hw/i386
Paolo Bonzini 8c9f42f3cf tco: do not generate an NMI
This behavior is not indicated in the datasheet and can confuse the OS.
The TCO can trap NMIs from SERR# or IOCHK# and convert them to SMIs; but
any other TCO event is either delivered as an SMI or completely disabled.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-04-05 17:23:52 +02:00
..
apic_internal.h Revert "apic: save apic_delivered flag" 2017-03-27 14:41:01 +02:00
apic-msidef.h q35: ioapic: add support for emulated IOAPIC IR 2016-07-21 20:43:49 +03:00
apic.h apic: move target-dependent definitions to cpu.h 2016-05-19 16:42:28 +02:00
ich9.h tco: do not generate an NMI 2017-04-05 17:23:52 +02:00
intel_iommu.h intel_iommu: add "caching-mode" option 2017-02-17 21:52:31 +02:00
ioapic_internal.h x86: ioapic: add support for explicit EOI 2016-08-03 18:44:57 +02:00
ioapic.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
pc.h i386: Change stepping of Haswell to non-blacklisted value 2017-03-10 15:01:09 -03:00
topology.h pc: Add x86_topo_ids_from_apicid() 2016-07-20 11:58:44 -03:00
x86-iommu.h intel_iommu: support device iotlb descriptor 2017-01-10 05:56:58 +02:00