Peter Maydell
76302a95e7
target/xtensa updates:
- add libisa to the xtensa target;
- change xtensa instruction translator to use it;
- switch existing xtensa cores to use it;
- add support for a number of instructions: salt/saltu, const16,
GPIO32 group, debug mode and MMU-related;
- add disassembler for Xtensa.
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Merge remote-tracking branch 'remotes/xtensa/tags/20180109-xtensa' into staging
target/xtensa updates:
- add libisa to the xtensa target;
- change xtensa instruction translator to use it;
- switch existing xtensa cores to use it;
- add support for a number of instructions: salt/saltu, const16,
GPIO32 group, debug mode and MMU-related;
- add disassembler for Xtensa.
# gpg: Signature made Tue 09 Jan 2018 18:11:02 GMT
# gpg: using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044
* remotes/xtensa/tags/20180109-xtensa:
target/xtensa: implement disassembler
target/xtensa: implement const16
target/xtensa: implement GPIO32
target/xtensa: implement salt/saltu
target/xtensa: add internal/noop SRs and opcodes
target/xtensa: drop DisasContext::litbase
target/xtensa: tests: fix memctl SR test
target/xtensa: use libisa for instruction decoding
target/xtensa: switch fsf to libisa
target/xtensa: switch dc233c to libisa
target/xtensa: switch dc232b to libisa
target/xtensa: update import_core.sh script for libisa
target/xtensa: extract FPU2000 opcode translators
target/xtensa: extract core opcode translators
target/xtensa: import libisa source
target/xtensa: pass actual frame size to the entry helper
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-09 18:23:27 +00:00
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