891a2fe720
Under LPAE, the cp15 registers PAR, TTBR0 and TTBR1 are extended to 64 bits, with a 64 bit (MRRC/MCRR) access path to read the full width of the register. Add the state fields for the top half and the 64 bit access path. Actual use of the top half of the register will come with the addition of the long-descriptor translation table format support. For the PAR we also need to correct the masking applied for 32 bit writes (there are no bits reserved if LPAE is implemented) and clear the high half when doing a 32 bit result VA-to-PA lookup. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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arm-semi.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
helper.c | ||
helper.h | ||
iwmmxt_helper.c | ||
machine.c | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
translate.c |