a146c6f88c
* Implement FEAT_ECV * STM32L4x5: Implement GPIO device * Fix 32-bit SMOPA * Refactor v7m related code from cpu32.c into its own file * hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmXrM50ZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l3aD/9BDWm3LNSIyHQ0qFD1l6wc JeAymSBecMD6sfRaPloLaB5HlU9AhLQWHe8Sa/hkWdYPhvhh6keESlVScJXi6Irq wm3MuDJwr9QZgXWuHsEwXj4sve+O/MgDHcYSyEldbcyqjbivMCUKCGXeT2VxQftd LarETxUTsdPeaWm3Lm11CkiO5r0DMJyebgVc6jloT9O1oK8szrkDix09U6eCGhXy l1ep0KY2mk+MtoboDflD3W/Zu0LrAZ1159r4LqTMD2Hp9Tt222aDOjEKi+Qjns22 E86YCy7kPcsHVOskF42SkZ8M044T/tCetKgnOHqn8hbTCW5uNT+zJNC1feAB92pi 4xWErOfYy7d5UVzWfUYudGKrb91rr5h2jd1SWn2NeQtdmU8KyFEjQS1y4FNZvPTD lrzyuTv8daeKSImq6JPzws/MJRh5I87TpRgKDg6hTJDaUCLu0yIuV9pkUsIdJ5mW 01ol8tmDgpBRsxjJlIf40KxOt5SQ2VoYh7L8jgRjGv9DEP5hU1AkPqQGtyx7Wcd/ ImRYQ/cOqircJPqX60DHljZDACVOzrFIEmpKvu45tt1On0iNXKCMuIl0vwI9XERx CSgqIz7KDI5gNlruZQDyHvVehQZW7sJo9rH5RawqObsUHTlg5rLb++79Da2RWtbV yvQLaI3qPngknz//1eAKxg== =YmPl -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20240308' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Implement FEAT_ECV * STM32L4x5: Implement GPIO device * Fix 32-bit SMOPA * Refactor v7m related code from cpu32.c into its own file * hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmXrM50ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l3aD/9BDWm3LNSIyHQ0qFD1l6wc # JeAymSBecMD6sfRaPloLaB5HlU9AhLQWHe8Sa/hkWdYPhvhh6keESlVScJXi6Irq # wm3MuDJwr9QZgXWuHsEwXj4sve+O/MgDHcYSyEldbcyqjbivMCUKCGXeT2VxQftd # LarETxUTsdPeaWm3Lm11CkiO5r0DMJyebgVc6jloT9O1oK8szrkDix09U6eCGhXy # l1ep0KY2mk+MtoboDflD3W/Zu0LrAZ1159r4LqTMD2Hp9Tt222aDOjEKi+Qjns22 # E86YCy7kPcsHVOskF42SkZ8M044T/tCetKgnOHqn8hbTCW5uNT+zJNC1feAB92pi # 4xWErOfYy7d5UVzWfUYudGKrb91rr5h2jd1SWn2NeQtdmU8KyFEjQS1y4FNZvPTD # lrzyuTv8daeKSImq6JPzws/MJRh5I87TpRgKDg6hTJDaUCLu0yIuV9pkUsIdJ5mW # 01ol8tmDgpBRsxjJlIf40KxOt5SQ2VoYh7L8jgRjGv9DEP5hU1AkPqQGtyx7Wcd/ # ImRYQ/cOqircJPqX60DHljZDACVOzrFIEmpKvu45tt1On0iNXKCMuIl0vwI9XERx # CSgqIz7KDI5gNlruZQDyHvVehQZW7sJo9rH5RawqObsUHTlg5rLb++79Da2RWtbV # yvQLaI3qPngknz//1eAKxg== # =YmPl # -----END PGP SIGNATURE----- # gpg: Signature made Fri 08 Mar 2024 15:49:49 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20240308' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Move v7m-related code from cpu32.c into a separate file hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later target/arm: Fix 32-bit SMOPA tests/qtest: Add STM32L4x5 GPIO QTest testcase hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC hw/gpio: Implement STM32L4x5 GPIO target/arm: Enable FEAT_ECV for 'max' CPU target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0 target/arm: Implement new FEAT_ECV trap bits target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written target/arm: use FIELD macro for CNTHCTL bit definitions target/arm: Timer _EL02 registers UNDEF for E2H == 0 target/arm: Move some register related defines to internals.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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.. | ||
allwinner-a10.c | ||
allwinner-h3.c | ||
allwinner-r40.c | ||
armsse.c | ||
armv7m.c | ||
aspeed_ast10x0.c | ||
aspeed_ast2400.c | ||
aspeed_ast2600.c | ||
aspeed_eeprom.c | ||
aspeed_eeprom.h | ||
aspeed_soc_common.c | ||
aspeed.c | ||
b-l475e-iot01a.c | ||
bananapi_m2u.c | ||
bcm2835_peripherals.c | ||
bcm2836.c | ||
bcm2838_peripherals.c | ||
bcm2838.c | ||
boot.c | ||
collie.c | ||
cubieboard.c | ||
digic_boards.c | ||
digic.c | ||
exynos4_boards.c | ||
exynos4210.c | ||
fby35.c | ||
fsl-imx6.c | ||
fsl-imx6ul.c | ||
fsl-imx7.c | ||
fsl-imx25.c | ||
fsl-imx31.c | ||
gumstix.c | ||
highbank.c | ||
imx25_pdk.c | ||
integratorcp.c | ||
Kconfig | ||
kzm.c | ||
mainstone.c | ||
mcimx6ul-evk.c | ||
mcimx7d-sabre.c | ||
meson.build | ||
microbit.c | ||
mps2-tz.c | ||
mps2.c | ||
mps3r.c | ||
msf2-soc.c | ||
msf2-som.c | ||
musca.c | ||
musicpal.c | ||
netduino2.c | ||
netduinoplus2.c | ||
npcm7xx_boards.c | ||
npcm7xx.c | ||
nrf51_soc.c | ||
nseries.c | ||
olimex-stm32-h405.c | ||
omap1.c | ||
omap2.c | ||
omap_sx1.c | ||
orangepi.c | ||
palm.c | ||
pxa2xx_gpio.c | ||
pxa2xx_pic.c | ||
pxa2xx.c | ||
raspi4b.c | ||
raspi.c | ||
realview.c | ||
sabrelite.c | ||
sbsa-ref.c | ||
smmu-common.c | ||
smmu-internal.h | ||
smmuv3-internal.h | ||
smmuv3.c | ||
spitz.c | ||
stellaris.c | ||
stm32f100_soc.c | ||
stm32f205_soc.c | ||
stm32f405_soc.c | ||
stm32l4x5_soc.c | ||
stm32vldiscovery.c | ||
strongarm.c | ||
strongarm.h | ||
tosa.c | ||
trace-events | ||
trace.h | ||
versatilepb.c | ||
vexpress.c | ||
virt-acpi-build.c | ||
virt.c | ||
xen_arm.c | ||
xilinx_zynq.c | ||
xlnx-versal-virt.c | ||
xlnx-versal.c | ||
xlnx-zcu102.c | ||
xlnx-zynqmp.c | ||
z2.c |