88c756bc9e
Currently the sbsa_gdwt watchdog device hardcodes its frequency at 62.5MHz. In real hardware, this watchdog is supposed to be driven from the system counter, which also drives the CPU generic timers. Newer CPU types (in particular from Armv8.6) should have a CPU generic timer frequency of 1GHz, so we can't leave the watchdog on the old QEMU default of 62.5GHz. Make the frequency a QOM property so it can be set by the board, and have our only board that uses this device set that frequency to the same value it sets the CPU frequency. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240426122913.3427983-4-peter.maydell@linaro.org |
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.. | ||
allwinner-wdt.c | ||
cmsdk-apb-watchdog.c | ||
Kconfig | ||
meson.build | ||
sbsa_gwdt.c | ||
spapr_watchdog.c | ||
trace-events | ||
trace.h | ||
watchdog.c | ||
wdt_aspeed.c | ||
wdt_diag288.c | ||
wdt_i6300esb.c | ||
wdt_ib700.c | ||
wdt_imx2.c |