97cfb5e430
ISADeviceClass is an empty class and just increase code complexity. Remove it, directly embedding DeviceClass in classes expanding TYPE_ISA_DEVICE. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20230215161641.32663-19-philmd@linaro.org>
77 lines
2.6 KiB
C
77 lines
2.6 KiB
C
/*
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* QEMU 8259 - internal interfaces
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*
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* Copyright (c) 2011 Jan Kiszka, Siemens AG
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef QEMU_I8259_INTERNAL_H
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#define QEMU_I8259_INTERNAL_H
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#include "hw/isa/isa.h"
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#include "hw/intc/intc.h"
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#include "hw/intc/i8259.h"
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#include "qom/object.h"
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#define TYPE_PIC_COMMON "pic-common"
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OBJECT_DECLARE_TYPE(PICCommonState, PICCommonClass, PIC_COMMON)
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struct PICCommonClass {
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DeviceClass parent_class;
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void (*pre_save)(PICCommonState *s);
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void (*post_load)(PICCommonState *s);
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};
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struct PICCommonState {
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ISADevice parent_obj;
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uint8_t last_irr; /* edge detection */
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uint8_t irr; /* interrupt request register */
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uint8_t imr; /* interrupt mask register */
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uint8_t isr; /* interrupt service register */
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uint8_t priority_add; /* highest irq priority */
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uint8_t irq_base;
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uint8_t read_reg_select;
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uint8_t poll;
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uint8_t special_mask;
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uint8_t init_state;
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uint8_t auto_eoi;
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uint8_t rotate_on_auto_eoi;
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uint8_t special_fully_nested_mode;
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uint8_t init4; /* true if 4 byte init */
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uint8_t single_mode; /* true if slave pic is not initialized */
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uint8_t elcr; /* PIIX edge/trigger selection*/
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uint8_t elcr_mask;
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qemu_irq int_out[1];
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uint32_t master; /* reflects /SP input pin */
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uint32_t iobase;
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uint32_t elcr_addr;
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MemoryRegion base_io;
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MemoryRegion elcr_io;
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};
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void pic_reset_common(PICCommonState *s);
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ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master);
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void pic_stat_update_irq(int irq, int level);
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#endif /* QEMU_I8259_INTERNAL_H */
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