qemu/target/mips
Aleksandar Markovic 0513503480 target/mips: msa: Split helpers for MULV.<B|H|W|D>
Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <20200613152133.8964-15-aleksandar.qemu.devel@gmail.com>
2020-06-15 20:51:04 +02:00
..
cp0_helper.c
cp0_timer.c
cpu-param.h target/mips: Support variable page size 2020-06-01 13:28:21 +02:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.h target/mips: Add Loongson-3 CPU definition 2020-06-09 17:32:45 +02:00
dsp_helper.c
fpu_helper.c target/mips: fpu: Refactor conversion from ieee to mips exception flags 2020-06-09 17:32:45 +02:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.c
helper.h target/mips: msa: Split helpers for MULV.<B|H|W|D> 2020-06-15 20:51:04 +02:00
internal.h target/mips: Add Loongson-3 CPU definition 2020-06-09 17:32:45 +02:00
kvm_mips.h
kvm.c target/mips: Add more CP0 register for save/restore 2020-06-01 13:28:21 +02:00
lmmi_helper.c target/mips: Add Loongson-3 CPU definition 2020-06-09 17:32:45 +02:00
machine.c target/mips: Add more CP0 register for save/restore 2020-06-01 13:28:21 +02:00
Makefile.objs target/mips: Add Loongson-3 CPU definition 2020-06-09 17:32:45 +02:00
mips-defs.h target/mips: Add comments for vendor-specific ASEs 2020-06-15 20:33:16 +02:00
mips-semi.c
msa_helper.c target/mips: msa: Split helpers for MULV.<B|H|W|D> 2020-06-15 20:51:04 +02:00
op_helper.c
TODO
trace-events
translate_init.inc.c target/mips: Enable hardware page table walker and CMGCR features for P5600 2020-06-09 17:32:45 +02:00
translate.c target/mips: msa: Split helpers for MULV.<B|H|W|D> 2020-06-15 20:51:04 +02:00