130 lines
4.5 KiB
C
130 lines
4.5 KiB
C
/*
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* libqos PCI bindings
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*
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* Copyright IBM, Corp. 2012-2013
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef LIBQOS_PCI_H
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#define LIBQOS_PCI_H
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#include "libqtest.h"
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#include "qgraph.h"
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#define QPCI_PIO_LIMIT 0x10000
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#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
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typedef struct QPCIDevice QPCIDevice;
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typedef struct QPCIBus QPCIBus;
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typedef struct QPCIBar QPCIBar;
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typedef struct QPCIAddress QPCIAddress;
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struct QPCIBus {
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uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr);
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uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr);
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uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr);
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uint64_t (*pio_readq)(QPCIBus *bus, uint32_t addr);
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void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
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void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
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void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
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void (*pio_writeq)(QPCIBus *bus, uint32_t addr, uint64_t value);
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void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len);
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void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len);
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uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset);
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uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset);
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uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset);
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void (*config_writeb)(QPCIBus *bus, int devfn,
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uint8_t offset, uint8_t value);
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void (*config_writew)(QPCIBus *bus, int devfn,
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uint8_t offset, uint16_t value);
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void (*config_writel)(QPCIBus *bus, int devfn,
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uint8_t offset, uint32_t value);
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QTestState *qts;
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uint16_t pio_alloc_ptr;
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uint64_t mmio_alloc_ptr, mmio_limit;
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bool has_buggy_msi; /* TRUE for spapr, FALSE for pci */
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};
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struct QPCIBar {
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uint64_t addr;
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};
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struct QPCIDevice
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{
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QPCIBus *bus;
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int devfn;
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bool msix_enabled;
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QPCIBar msix_table_bar, msix_pba_bar;
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uint64_t msix_table_off, msix_pba_off;
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};
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struct QPCIAddress {
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uint32_t devfn;
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uint16_t vendor_id;
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uint16_t device_id;
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};
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void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
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void (*func)(QPCIDevice *dev, int devfn, void *data),
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void *data);
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QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn);
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void qpci_device_init(QPCIDevice *dev, QPCIBus *bus, QPCIAddress *addr);
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bool qpci_has_buggy_msi(QPCIDevice *dev);
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bool qpci_check_buggy_msi(QPCIDevice *dev);
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void qpci_device_enable(QPCIDevice *dev);
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uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr);
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void qpci_msix_enable(QPCIDevice *dev);
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void qpci_msix_disable(QPCIDevice *dev);
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bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry);
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bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry);
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uint16_t qpci_msix_table_size(QPCIDevice *dev);
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uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset);
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uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset);
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uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset);
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void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value);
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void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value);
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void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
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uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off);
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uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off);
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uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off);
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uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off);
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void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off,
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uint8_t value);
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void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off,
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uint16_t value);
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void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off,
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uint32_t value);
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void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off,
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uint64_t value);
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void qpci_memread(QPCIDevice *bus, QPCIBar token, uint64_t off,
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void *buf, size_t len);
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void qpci_memwrite(QPCIDevice *bus, QPCIBar token, uint64_t off,
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const void *buf, size_t len);
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QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr);
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void qpci_iounmap(QPCIDevice *dev, QPCIBar addr);
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QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr);
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void qpci_unplug_acpi_device_test(QTestState *qs, const char *id, uint8_t slot);
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void add_qpci_address(QOSGraphEdgeOptions *opts, QPCIAddress *addr);
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#endif
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