6e42be7cd1
A transition from CPUFooState to FooCPU can be considered safe,
just like FooCPU::env access in the opposite direction.
The only benefit of the FOO_CPU() casts would be protection against
bogus CPUFooState pointers, but then surrounding code would likely
break, too.
This should slightly improve interrupt etc. performance when going from
CPUFooState to FooCPU.
For any additional CPU() casts see 3556c233d9
(qom: allow turning cast debugging off).
Reported-by: Anthony Liguori <aliguori@us.ibm.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
/*
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* QEMU MIPS CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_MIPS_CPU_QOM_H
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#define QEMU_MIPS_CPU_QOM_H
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#include "qom/cpu.h"
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#ifdef TARGET_MIPS64
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#define TYPE_MIPS_CPU "mips64-cpu"
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#else
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#define TYPE_MIPS_CPU "mips-cpu"
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#endif
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#define MIPS_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(MIPSCPUClass, (klass), TYPE_MIPS_CPU)
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#define MIPS_CPU(obj) \
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OBJECT_CHECK(MIPSCPU, (obj), TYPE_MIPS_CPU)
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#define MIPS_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU)
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/**
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* MIPSCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* A MIPS CPU model.
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*/
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typedef struct MIPSCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} MIPSCPUClass;
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/**
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* MIPSCPU:
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* @env: #CPUMIPSState
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*
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* A MIPS CPU.
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*/
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typedef struct MIPSCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUMIPSState env;
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} MIPSCPU;
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static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
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{
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return container_of(env, MIPSCPU, env);
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}
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#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e))
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#define ENV_OFFSET offsetof(MIPSCPU, env)
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void mips_cpu_do_interrupt(CPUState *cpu);
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void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags);
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#endif
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