qemu/target
Jakub Jermář 7353113fa4 mips: Decide to map PAGE_EXEC in map_address
This commit addresses QEMU Bug #1825311:

  mips_cpu_handle_mmu_fault renders all accessed pages executable

It allows finer-grained control over whether the accessed page should
be executable by moving the decision to the underlying map_address
function, which has more information for this.

As a result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.

Fixes: https://bugs.launchpad.net/qemu/+bug/1825311
Fixes: 2fb58b7374 ('target-mips: add RI and XI fields to TLB entry')

Signed-off-by: Jakub Jermář <jakub.jermar@kernkonzept.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190517123533.868479-1-jakub.jermar@kernkonzept.com>
2019-05-26 17:33:24 +02:00
..
alpha target/alpha: Fix user-only floating-point exceptions 2019-05-19 07:30:03 -07:00
arm arm: Remove unnecessary includes of hw/arm/arm.h 2019-05-23 14:47:43 +01:00
cris Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
hppa tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
i386 Introduce qemu_guest_getrandom. 2019-05-23 12:57:17 +01:00
lm32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
m68k code cleanup, switch to transaction_failed hook 2019-05-17 10:28:23 +01:00
microblaze tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
mips mips: Decide to map PAGE_EXEC in map_address 2019-05-26 17:33:24 +02:00
moxie tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
nios2 Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
openrisc tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
ppc target/ppc: Use qemu_guest_getrandom for DARN 2019-05-22 12:38:54 -04:00
riscv Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
s390x s390x update: 2019-05-21 16:30:13 +01:00
sh4 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
sparc Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
tilegx target/tilegx: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
tricore Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
unicore32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
xtensa target/xtensa: SR reorganization and options for modern cores 2019-05-21 10:44:21 +01:00