qemu/include/hw/riscv
Philippe Mathieu-Daudé 8696b74a6f hw/riscv/opentitan: Explicit machine type definition
Expand the DEFINE_MACHINE() macro, converting the class_init()
handler.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230520054510.68822-5-philmd@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-06-13 17:18:54 +10:00
..
boot_opensbi.h
boot.h hw/riscv/boot.c: make riscv_load_initrd() static 2023-02-16 07:55:37 -08:00
microchip_pfsoc.h
numa.h hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() 2023-01-20 10:14:14 +10:00
opentitan.h hw/riscv/opentitan: Explicit machine type definition 2023-06-13 17:18:54 +10:00
riscv_hart.h
shakti_c.h
sifive_cpu.h
sifive_e.h
sifive_u.h hw/riscv: Move the dtb load bits outside of create_fdt() 2023-03-01 17:19:14 -08:00
spike.h hw/riscv/spike: use 'fdt' from MachineState 2023-01-20 10:14:13 +10:00
virt.h hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00