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Vikram Garhwal 98e5d7a2b7 hw/net/can: Introduce Xilinx ZynqMP CAN controller 
The Xilinx ZynqMP CAN controller is developed based on SocketCAN, QEMU CAN bus
implementation. Bus connection and socketCAN connection for each CAN module
can be set through command lines.

Example for using single CAN:
    -object can-bus,id=canbus0 \
    -machine xlnx-zcu102.canbus0=canbus0 \
    -object can-host-socketcan,id=socketcan0,if=vcan0,canbus=canbus0

Example for connecting both CAN to same virtual CAN on host machine:
    -object can-bus,id=canbus0 -object can-bus,id=canbus1 \
    -machine xlnx-zcu102.canbus0=canbus0 \
    -machine xlnx-zcu102.canbus1=canbus1 \
    -object can-host-socketcan,id=socketcan0,if=vcan0,canbus=canbus0 \
    -object can-host-socketcan,id=socketcan1,if=vcan0,canbus=canbus1

To create virtual CAN on the host machine, please check the QEMU CAN docs:
https://github.com/qemu/qemu/blob/master/docs/can.txt

Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-id: 1605728926-352690-2-git-send-email-fnu.vikram@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-10 11:30:44 +00:00
..
can_kvaser_pci.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
can_mioe3680_pci.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
can_pcm3680_pci.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
can_sja1000.c hw/net/can: sja1000 ignore CAN FD frames 2020-09-30 19:11:36 +02:00
can_sja1000.h hw/net/can: Make CanBusClientInfo::can_receive() return a boolean 2020-03-31 21:14:35 +08:00
ctu_can_fd_frame.h hw/net/can/ctucafd: Add CTU CAN FD core register definitions. 2020-09-30 19:11:37 +02:00
ctu_can_fd_regs.h hw/net/can/ctucafd: Add CTU CAN FD core register definitions. 2020-09-30 19:11:37 +02:00
ctucan_core.c hw/net/can/ctucan_core: Use stl_le_p to write to tx_buffers 2020-11-11 20:34:36 +08:00
ctucan_core.h hw/net/can/ctucan_core: Handle big-endian hosts 2020-11-11 20:34:36 +08:00
ctucan_pci.c hw/net/can: CTU CAN FD IP open hardware core emulation. 2020-09-30 19:11:37 +02:00
meson.build hw/net/can: Introduce Xilinx ZynqMP CAN controller 2020-12-10 11:30:44 +00:00
trace-events hw/net/can: Introduce Xilinx ZynqMP CAN controller 2020-12-10 11:30:44 +00:00
trace.h hw/net/can: Introduce Xilinx ZynqMP CAN controller 2020-12-10 11:30:44 +00:00
xlnx-zynqmp-can.c hw/net/can: Introduce Xilinx ZynqMP CAN controller 2020-12-10 11:30:44 +00:00