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qemu/hw/intc
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Frederic Barrat 151308677c pnv/xive2: Access direct mapped thread contexts from all chips 
When accessing a thread context through the IC BAR, the offset of the
page in the BAR identifies the CPU. From that offset, we can compute
the PIR (processor ID register) of the CPU to do the data structure
lookup. On P10, the current code assumes an access for node 0 when
computing the PIR. Everything is almost in place to allow access for
other nodes though. So this patch reworks how the PIR value is
computed so that we can access all thread contexts through the IC BAR.

The PIR is already correct on P9, so no need to modify anything there.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220602165310.558810-1-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20 08:38:58 -03:00
..
allwinner-a10-pic.c
apic_common.c
apic.c
arm_gic_common.c
arm_gic_kvm.c
arm_gic.c hw/intc/arm_gic: Allow reset of the running priority 2022-01-20 11:47:52 +00:00
arm_gicv2m.c
arm_gicv3_common.c hw/intc/arm_gicv3: Use correct number of priority bits for the CPU 2022-05-19 16:19:02 +01:00
arm_gicv3_cpuif_common.c hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c 2021-12-15 10:11:34 +00:00
arm_gicv3_cpuif.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
arm_gicv3_dist.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
arm_gicv3_its_common.c hw/intc/arm_gicv3_its: Revert version increments in vmstate_its 2021-11-22 18:17:19 +00:00
arm_gicv3_its_kvm.c hw/intc/arm_gicv3: Keep pointers to every connected ITS 2022-04-22 09:24:44 +01:00
arm_gicv3_its.c hw/intc/arm_gicv3: Update ID and feature registers for GICv4 2022-04-22 14:44:53 +01:00
arm_gicv3_kvm.c hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant 2022-05-19 16:19:02 +01:00
arm_gicv3_redist.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
arm_gicv3.c hw/intc/arm_gicv3: Specify valid and impl in MemoryRegionOps 2022-03-07 13:16:50 +00:00
armv7m_nvic.c arm: Move system PPB container handling to armv7m 2021-09-01 11:08:18 +01:00
aspeed_vic.c
bcm2835_ic.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
bcm2836_control.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
etraxfs_pic.c
exynos4210_combiner.c hw/arm/exynos4210: Put combiners into state struct 2022-04-21 11:37:04 +01:00
exynos4210_gic.c Misc cleanups 2022-04-21 09:27:54 -07:00
gic_internal.h
gicv3_internal.h hw/intc/arm_gicv3: Update ID and feature registers for GICv4 2022-04-22 14:44:53 +01:00
goldfish_pic.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
grlib_irqmp.c
heathrow_pic.c
i8259_common.c intc: Unexport InterruptStatsProviderClass-related functions 2022-01-27 12:08:50 +01:00
i8259.c
imx_avic.c
imx_gpcv2.c
intc.c
ioapic_common.c intc: Unexport InterruptStatsProviderClass-related functions 2022-01-27 12:08:50 +01:00
ioapic.c
Kconfig hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
loongarch_extioi.c hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
loongarch_ipi.c hw/loongarch: Add LoongArch ipi interrupt support(IPI) 2022-06-06 18:10:46 +00:00
loongarch_pch_msi.c hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) 2022-06-06 18:12:28 +00:00
loongarch_pch_pic.c hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC) 2022-06-06 18:11:55 +00:00
loongson_liointc.c
m68k_irqc.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
meson.build hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
mips_gic.c
nios2_vic.c hw/intc: Vectored Interrupt Controller (VIC) 2022-04-26 08:17:05 -07:00
omap_intc.c
ompic.c
openpic_kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
openpic.c hw/intc: openpic: Clean up the styles 2021-09-30 12:26:06 +10:00
pl190.c
pnv_xive2_regs.h pnv/xive2: Add support for automatic save&restore 2022-03-02 06:51:39 +01:00
pnv_xive2.c pnv/xive2: Access direct mapped thread contexts from all chips 2022-06-20 08:38:58 -03:00
pnv_xive_regs.h
pnv_xive.c ppc/xive: Add support for PQ state bits offload 2022-03-02 06:51:39 +01:00
ppc-uic.c
realview_gic.c
riscv_aclint.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
riscv_aplic.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
riscv_imsic.c hw/intc: Add RISC-V AIA IMSIC device emulation 2022-03-03 13:14:50 +10:00
rx_icu.c
s390_flic_kvm.c Replace qemu_real_host_page variables with inlined functions 2022-04-06 10:50:38 +02:00
s390_flic.c
sh_intc.c hw/intc/sh_intc: Remove unneeded local variable initialisers 2021-10-30 18:39:37 +02:00
sifive_plic.c hw/intc: sifive_plic: Avoid overflowing the addr_config buffer 2022-06-10 09:31:42 +10:00
slavio_intctl.c
spapr_xive_kvm.c spapr/xive: Use xive_esb_rw() to trigger interrupts 2021-10-21 11:42:47 +11:00
spapr_xive.c ppc/xive: Add support for PQ state bits offload 2022-03-02 06:51:39 +01:00
trace-events hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
trace.h
vgic_common.h
xics_kvm.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
xics_pnv.c
xics_spapr.c
xics.c Use g_new() & friends where that makes obvious sense 2022-03-21 15:44:44 +01:00
xilinx_intc.c
xive2.c ppc/xive: Update the state of the External interrupt signal 2022-05-05 15:36:17 -03:00
xive.c ppc/xive: Update the state of the External interrupt signal 2022-05-05 15:36:17 -03:00
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c