831ec7f3d1
Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210505160620.15723-13-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
363 lines
8.1 KiB
C++
363 lines
8.1 KiB
C++
/*
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* RISC-V translation routines for the RVB Standard Extension.
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*
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* Copyright (c) 2020 Kito Cheng, kito.cheng@sifive.com
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* Copyright (c) 2020 Frank Chang, frank.chang@sifive.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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static bool trans_clz(DisasContext *ctx, arg_clz *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, gen_clz);
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}
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static bool trans_ctz(DisasContext *ctx, arg_ctz *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, gen_ctz);
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}
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static bool trans_cpop(DisasContext *ctx, arg_cpop *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, tcg_gen_ctpop_tl);
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}
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static bool trans_andn(DisasContext *ctx, arg_andn *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_andc_tl);
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}
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static bool trans_orn(DisasContext *ctx, arg_orn *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_orc_tl);
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}
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static bool trans_xnor(DisasContext *ctx, arg_xnor *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_eqv_tl);
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}
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static bool trans_pack(DisasContext *ctx, arg_pack *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, gen_pack);
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}
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static bool trans_packu(DisasContext *ctx, arg_packu *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, gen_packu);
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}
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static bool trans_packh(DisasContext *ctx, arg_packh *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, gen_packh);
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}
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static bool trans_min(DisasContext *ctx, arg_min *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_smin_tl);
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}
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static bool trans_max(DisasContext *ctx, arg_max *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_smax_tl);
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}
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static bool trans_minu(DisasContext *ctx, arg_minu *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_umin_tl);
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}
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static bool trans_maxu(DisasContext *ctx, arg_maxu *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, tcg_gen_umax_tl);
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}
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static bool trans_sext_b(DisasContext *ctx, arg_sext_b *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, tcg_gen_ext8s_tl);
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}
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static bool trans_sext_h(DisasContext *ctx, arg_sext_h *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, tcg_gen_ext16s_tl);
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}
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static bool trans_bset(DisasContext *ctx, arg_bset *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_bset);
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}
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static bool trans_bseti(DisasContext *ctx, arg_bseti *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_bset);
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}
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static bool trans_bclr(DisasContext *ctx, arg_bclr *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_bclr);
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}
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static bool trans_bclri(DisasContext *ctx, arg_bclri *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_bclr);
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}
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static bool trans_binv(DisasContext *ctx, arg_binv *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_binv);
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}
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static bool trans_binvi(DisasContext *ctx, arg_binvi *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_binv);
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}
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static bool trans_bext(DisasContext *ctx, arg_bext *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_bext);
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}
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static bool trans_bexti(DisasContext *ctx, arg_bexti *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_bext);
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}
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static bool trans_slo(DisasContext *ctx, arg_slo *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_slo);
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}
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static bool trans_sloi(DisasContext *ctx, arg_sloi *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_slo);
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}
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static bool trans_sro(DisasContext *ctx, arg_sro *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_sro);
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}
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static bool trans_sroi(DisasContext *ctx, arg_sroi *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, gen_sro);
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}
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static bool trans_ror(DisasContext *ctx, arg_ror *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, tcg_gen_rotr_tl);
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}
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static bool trans_rori(DisasContext *ctx, arg_rori *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shifti(ctx, a, tcg_gen_rotr_tl);
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}
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static bool trans_rol(DisasContext *ctx, arg_rol *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, tcg_gen_rotl_tl);
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}
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static bool trans_grev(DisasContext *ctx, arg_grev *a)
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{
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REQUIRE_EXT(ctx, RVB);
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return gen_shift(ctx, a, gen_helper_grev);
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}
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static bool trans_grevi(DisasContext *ctx, arg_grevi *a)
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{
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REQUIRE_EXT(ctx, RVB);
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if (a->shamt >= TARGET_LONG_BITS) {
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return false;
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}
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return gen_grevi(ctx, a);
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}
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static bool trans_clzw(DisasContext *ctx, arg_clzw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, gen_clzw);
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}
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static bool trans_ctzw(DisasContext *ctx, arg_ctzw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, gen_ctzw);
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}
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static bool trans_cpopw(DisasContext *ctx, arg_cpopw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_unary(ctx, a, gen_cpopw);
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}
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static bool trans_packw(DisasContext *ctx, arg_packw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, gen_packw);
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}
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static bool trans_packuw(DisasContext *ctx, arg_packuw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_arith(ctx, a, gen_packuw);
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}
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static bool trans_bsetw(DisasContext *ctx, arg_bsetw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_bset);
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}
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static bool trans_bsetiw(DisasContext *ctx, arg_bsetiw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_bset);
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}
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static bool trans_bclrw(DisasContext *ctx, arg_bclrw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_bclr);
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}
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static bool trans_bclriw(DisasContext *ctx, arg_bclriw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_bclr);
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}
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static bool trans_binvw(DisasContext *ctx, arg_binvw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_binv);
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}
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static bool trans_binviw(DisasContext *ctx, arg_binviw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_binv);
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}
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static bool trans_bextw(DisasContext *ctx, arg_bextw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_bext);
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}
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static bool trans_slow(DisasContext *ctx, arg_slow *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_slo);
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}
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static bool trans_sloiw(DisasContext *ctx, arg_sloiw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_slo);
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}
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static bool trans_srow(DisasContext *ctx, arg_srow *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_sro);
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}
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static bool trans_sroiw(DisasContext *ctx, arg_sroiw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_sro);
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}
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static bool trans_rorw(DisasContext *ctx, arg_rorw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_rorw);
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}
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static bool trans_roriw(DisasContext *ctx, arg_roriw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_rorw);
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}
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static bool trans_rolw(DisasContext *ctx, arg_rolw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_rolw);
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}
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static bool trans_grevw(DisasContext *ctx, arg_grevw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftw(ctx, a, gen_grevw);
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}
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static bool trans_greviw(DisasContext *ctx, arg_greviw *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_EXT(ctx, RVB);
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return gen_shiftiw(ctx, a, gen_grevw);
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}
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