24ece07250
Now that we are using real HW ids for the cores in PowerNV chips, we can route the XSCOM accesses to them. We just need to attach a specific XSCOM memory region to each core in the appropriate window for the core number. To start with, let's install the DTS (Digital Thermal Sensor) handlers which should return 38°C for each core. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* QEMU PowerPC PowerNV CPU Core model
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*
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* Copyright (c) 2016, IBM Corporation.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public License
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* as published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _PPC_PNV_CORE_H
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#define _PPC_PNV_CORE_H
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#include "hw/cpu/core.h"
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#define TYPE_PNV_CORE "powernv-cpu-core"
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#define PNV_CORE(obj) \
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OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE)
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#define PNV_CORE_CLASS(klass) \
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OBJECT_CLASS_CHECK(PnvCoreClass, (klass), TYPE_PNV_CORE)
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#define PNV_CORE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PnvCoreClass, (obj), TYPE_PNV_CORE)
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typedef struct PnvCore {
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/*< private >*/
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CPUCore parent_obj;
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/*< public >*/
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void *threads;
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uint32_t pir;
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MemoryRegion xscom_regs;
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} PnvCore;
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typedef struct PnvCoreClass {
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DeviceClass parent_class;
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ObjectClass *cpu_oc;
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} PnvCoreClass;
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extern char *pnv_core_typename(const char *model);
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#endif /* _PPC_PNV_CORE_H */
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