Stefan Hajnoczi
74949263a5
util: Add cpuinfo for loongarch64
tcg/loongarch64: Use cpuinfo.h
tcg/loongarch64: Improve register allocation for INDEX_op_qemu_ld_a*_i128
host/include/loongarch64: Add atomic16 load and store
tcg: Move expanders out of line
tcg/mips: Always implement movcond
tcg/mips: Implement neg opcodes
tcg/loongarch64: Implement neg opcodes
tcg: Make movcond and neg required opcodes
tcg: Optimize env memory operations
tcg: Canonicalize sub of immediate to add
tcg/sparc64: Implement tcg_out_extrl_i64_i32
-----BEGIN PGP SIGNATURE-----
iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVJpT0dHHJpY2hhcmQu
aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9i7QgAtjxUB3y/caCPp0Me
3cXYtpL1vNxx+cTESGMlmIRSji+cEOxYSpnY0itxXcKpcwP8Au8eoTe85NxyIllg
2R/SA2jlmrmiipI+bwb0UBCy+BzUfMgmegA88K2W22J0fetwIy19PN9ORmYdLiYE
/pWNFOSPzhYEJgOw7V2MwciUv3llolMOfxU7VT4oVaCknZRsyaGUwl4uTT4GdPuK
p29O9nziyKDmNTqJ9SKKll5bzwCMAgkn2lUcMGf+rpl7ZxjgvysUYrGXKmOnj4Uu
eCU2d3ZHoSspcYEjbFASlyPd7z5apGI8Iq2K35FUhURFPv06Su/bIGOOD4ujP2Qp
vc/bFQ==
=Mvaf
-----END PGP SIGNATURE-----
Merge tag 'pull-tcg-20231106' of https://gitlab.com/rth7680/qemu into staging
util: Add cpuinfo for loongarch64
tcg/loongarch64: Use cpuinfo.h
tcg/loongarch64: Improve register allocation for INDEX_op_qemu_ld_a*_i128
host/include/loongarch64: Add atomic16 load and store
tcg: Move expanders out of line
tcg/mips: Always implement movcond
tcg/mips: Implement neg opcodes
tcg/loongarch64: Implement neg opcodes
tcg: Make movcond and neg required opcodes
tcg: Optimize env memory operations
tcg: Canonicalize sub of immediate to add
tcg/sparc64: Implement tcg_out_extrl_i64_i32
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVJpT0dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9i7QgAtjxUB3y/caCPp0Me
# 3cXYtpL1vNxx+cTESGMlmIRSji+cEOxYSpnY0itxXcKpcwP8Au8eoTe85NxyIllg
# 2R/SA2jlmrmiipI+bwb0UBCy+BzUfMgmegA88K2W22J0fetwIy19PN9ORmYdLiYE
# /pWNFOSPzhYEJgOw7V2MwciUv3llolMOfxU7VT4oVaCknZRsyaGUwl4uTT4GdPuK
# p29O9nziyKDmNTqJ9SKKll5bzwCMAgkn2lUcMGf+rpl7ZxjgvysUYrGXKmOnj4Uu
# eCU2d3ZHoSspcYEjbFASlyPd7z5apGI8Iq2K35FUhURFPv06Su/bIGOOD4ujP2Qp
# vc/bFQ==
# =Mvaf
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 07 Nov 2023 10:47:25 HKT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20231106' of https://gitlab.com/rth7680/qemu: (35 commits)
tcg/sparc64: Implement tcg_out_extrl_i64_i32
tcg/optimize: Canonicalize sub2 with constants to add2
tcg/optimize: Canonicalize subi to addi during optimization
tcg: Canonicalize subi to addi during opcode generation
tcg/optimize: Split out arg_new_constant
tcg: Eliminate duplicate env store operations
tcg/optimize: Optimize env memory operations
tcg/optimize: Split out cmp_better_copy
tcg/optimize: Pipe OptContext into reset_ts
tcg: Don't free vector results
tcg: Remove TCG_TARGET_HAS_neg_{i32,i64}
tcg/loongarch64: Implement neg opcodes
tcg/mips: Implement neg opcodes
tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64}
tcg/mips: Always implement movcond
tcg/mips: Split out tcg_out_setcond_int
tcg: Move tcg_temp_free_* out of line
tcg: Move tcg_temp_new_*, tcg_global_mem_new_* out of line
tcg: Move tcg_constant_* out of line
tcg: Unexport tcg_gen_op*_{i32,i64}
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07 11:05:37 +08:00
..
2023-05-30 17:37:26 +02:00
2023-05-30 17:37:26 +02:00
2023-05-30 17:37:26 +02:00
2023-05-30 17:37:26 +02:00
2023-05-23 16:51:13 -07:00
2023-06-13 11:28:58 +02:00
2023-10-04 09:52:06 -04:00
2023-10-04 09:52:06 -04:00
2023-05-18 08:53:52 +02:00
2023-09-19 13:20:54 -04:00
2023-09-15 13:57:00 +00:00
2023-11-06 08:27:21 -08:00
2023-08-31 19:47:43 +02:00
2023-05-23 15:20:15 +08:00
2023-10-19 23:13:27 +02:00
2023-10-31 15:41:42 +01:00
2023-05-30 17:37:26 +02:00
2023-08-30 07:39:59 -04:00
2023-05-30 17:37:26 +02:00
2023-11-06 15:00:27 +00:00
2023-10-06 13:27:48 +02:00
2023-08-09 09:26:32 -07:00
2023-09-07 20:32:11 -05:00
2023-10-07 19:02:33 +02:00
2023-08-31 19:47:43 +02:00
2023-11-07 11:05:37 +08:00
2023-09-15 05:26:50 -07:00
2023-10-03 15:05:20 +04:00
2023-08-31 19:47:43 +02:00
2023-05-30 17:37:26 +02:00
2023-06-06 09:42:14 +02:00
2023-10-17 15:20:53 +02:00
2023-08-31 19:47:43 +02:00
2023-06-01 11:05:05 -04:00
2023-11-03 09:20:31 +01:00
2023-08-31 19:47:43 +02:00
2023-11-03 09:20:31 +01:00
2023-09-01 13:34:03 -07:00
2023-10-31 15:42:14 +01:00
2023-08-29 10:49:24 +02:00
2023-06-27 17:08:56 +02:00
2023-11-03 09:20:31 +01:00
2023-05-24 09:21:22 +02:00
2023-09-29 10:07:16 +02:00