Peter Maydell 81f681106e target/arm: Convert VFP two-register transfer insns to decodetree ... Convert the VFP two-register transfer instructions to decodetree (in the v8 Arm ARM these are the "Advanced SIMD and floating-point 64-bit move" encoding group). Again, we expand out the sequences involving gen_vfp_msr() and gen_msr_vfp(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>		2019-06-13 15:14:04 +01:00
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alpha	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
arm	target/arm: Convert VFP two-register transfer insns to decodetree	2019-06-13 15:14:04 +01:00
cris	Supply missing header guards	2019-06-12 13:20:21 +02:00
hppa	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
i386	Miscellaneous patches for 2019-06-11	2019-06-12 13:50:02 +01:00
lm32	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
m68k	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
microblaze	Supply missing header guards	2019-06-12 13:20:21 +02:00
mips	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
moxie	Supply missing header guards	2019-06-12 13:20:21 +02:00
nios2	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
openrisc	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
ppc	ppc patch queue 2019-06-12	2019-06-12 14:43:47 +01:00
riscv	Supply missing header guards	2019-06-12 13:20:21 +02:00
s390x	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
sh4	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
sparc	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
tilegx	Normalize position of header guard	2019-06-12 13:20:20 +02:00
tricore	Supply missing header guards	2019-06-12 13:20:21 +02:00
unicore32	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
xtensa	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00