Richard Henderson 81ae05fa2d target/arm: Add MTE bits to tb_flags ... Cache the composite ATA setting. Cache when MTE is fully enabled, i.e. access to tags are enabled and tag checks affect the PE. Do this for both the normal context and the UNPRIV context. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200626033144.790098-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-06-26 14:31:12 +01:00
..
alpha	accel/tcg: Relax va restrictions on 64-bit guests	2020-05-15 15:25:16 +01:00
arm	target/arm: Add MTE bits to tb_flags	2020-06-26 14:31:12 +01:00
cris	…
hppa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
i386	qdev: Convert bus-less devices to qdev_realize() with Coccinelle	2020-06-15 22:06:04 +02:00
lm32	…
m68k	target/m68k: implement opcode fetoxm1	2020-06-02 13:59:02 +02:00
microblaze	target/microblaze: monitor: Increase the number of registers reported	2020-05-14 16:01:02 +02:00
mips	target/mips: msa: Split helpers for MULV.<B|H|W|D>	2020-06-15 20:51:04 +02:00
moxie	…
nios2	…
openrisc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
ppc	target/ppc: Remove TIDR from POWER10 processor	2020-06-26 09:22:30 +10:00
riscv	hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004	2020-06-19 08:25:27 -07:00
rx	…
s390x	vfio-ccw: Add support for the schib region	2020-06-18 12:13:54 +02:00
sh4	gdbstub: Introduce gdb_get_float32() to get 32-bit float registers	2020-04-15 11:38:23 +01:00
sparc	target/sparc/int32_helper: Extract and use excp_name_str()	2020-06-09 09:21:10 +02:00
tilegx	…
tricore	target/tricore: Implement gdbstub	2020-06-01 16:55:13 +02:00
unicore32	target/unicore32: Prefer qemu_semihosting_log_out() over curses	2020-06-09 19:58:53 +02:00
xtensa	target/xtensa fixes for 5.1:	2020-06-25 21:20:45 +01:00