qemu/include/hw/ppc
Benjamin Herrenschmidt a2dd4e83e7 ppc/hash64: Rework R and C bit updates
With MT-TCG, we are now running translation in a racy way, thus
we need to mimic hardware when it comes to updating the R and
C bits, by doing byte stores.

The current "store_hpte" abstraction is ill suited for this, we
replace it with two separate callbacks for setting R and C.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190411080004.8690-4-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-04-26 11:37:57 +10:00
..
fdt.h
mac_dbdma.h
openpic_kvm.h
openpic.h
pnv_core.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
pnv_lpc.h ppc/pnv: add SerIRQ routing registers 2019-03-12 14:33:04 +11:00
pnv_occ.h ppc/pnv: add a OCC model for POWER9 2019-03-12 14:33:04 +11:00
pnv_psi.h
pnv_xive.h
pnv_xscom.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
pnv.h ppc/pnv: POWER9 XSCOM quad support 2019-03-12 14:33:04 +11:00
ppc4xx.h
ppc_e500.h
ppc.h
spapr_cpu_core.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_drc.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_irq.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_ovec.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_rtas.h
spapr_vio.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr_xive.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
spapr.h ppc/hash64: Rework R and C bit updates 2019-04-26 11:37:57 +10:00
xics_spapr.h spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
xics.h
xive_regs.h
xive.h