qemu/target
Peter Maydell 80d2b43b2f target/arm: Make writes to MDCR_EL3 use PMU start/finish calls
In commit 01765386a8 we fixed a bug where we weren't correctly
bracketing changes to some registers with pmu_op_start() and
pmu_op_finish() calls for changes which affect whether the PMU
counters might be enabled.  However, we missed the case of writes to
the AArch64 MDCR_EL3 register, because (unlike its AArch32
counterpart) they are currently done directly to the CPU state struct
without going through the sdcr_write() function.

Give MDCR_EL3 a writefn which handles the PMU start/finish calls.
The SDCR writefn then simplfies to "call the MDCR_EL3 writefn after
masking off the bits which don't exist in the AArch32 register".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220923123412.1214041-3-peter.maydell@linaro.org
2022-09-29 17:31:52 +01:00
..
alpha accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
arm target/arm: Make writes to MDCR_EL3 use PMU start/finish calls 2022-09-29 17:31:52 +01:00
avr accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
cris accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
hexagon Hexagon (target/hexagon) remove unused encodings 2022-09-19 11:44:20 -07:00
hppa linux-user/hppa: Dump IIR on register dump 2022-09-27 09:29:33 +02:00
i386 target/i386: introduce insn_get_addr 2022-09-19 15:16:00 +02:00
loongarch accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
m68k target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check 2022-09-26 23:37:22 +02:00
microblaze accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
mips target/mips: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
nios2 target/nios2: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
openrisc accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
ppc target/ppc: Clear fpstatus flags on helpers missing it 2022-09-20 10:54:06 -03:00
riscv target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unordered 2022-09-27 11:23:57 +10:00
rx accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
s390x s390x/pci: enable for load/store interpretation 2022-09-26 17:23:47 +02:00
sh4 accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
sparc accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
tricore accel/tcg: Add pc and host_pc params to gen_intermediate_code 2022-09-06 08:04:26 +01:00
xtensa target/xtensa: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00