qemu/hw/riscv
Bin Meng 806c64b7b0
riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes
Now that we have added a PRCI node, update existing UART and ethernet
nodes to reference PRCI as their clock sources, to keep in sync with
the Linux kernel device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-09-17 08:42:48 -07:00
..
boot.c riscv: Resolve full path of the given bios image 2019-09-17 08:42:43 -07:00
Kconfig riscv: sifive_e: Drop sifive_mmio_emulate() 2019-09-17 08:42:46 -07:00
Makefile.objs riscv: sifive: Implement PRCI model for FU540 2019-09-17 08:42:47 -07:00
riscv_hart.c riscv: hart: Add a "hartid-base" property to RISC-V hart array 2019-09-17 08:42:47 -07:00
riscv_htif.c hw: Do not include "exec/address-spaces.h" if it is not necessary 2018-06-01 14:15:10 +02:00
sifive_clint.c Include hw/qdev-properties.h less 2019-08-16 13:31:53 +02:00
sifive_e_prci.c riscv: sifive_e: prci: Update the PRCI register block size 2019-09-17 08:42:46 -07:00
sifive_e.c riscv: sifive_e: Drop sifive_mmio_emulate() 2019-09-17 08:42:46 -07:00
sifive_gpio.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
sifive_plic.c riscv: plic: Remove unused interrupt functions 2019-09-17 08:42:42 -07:00
sifive_test.c riscv: hw: Remove the unnecessary include of target/riscv/cpu.h 2019-09-17 08:42:45 -07:00
sifive_u_prci.c riscv: sifive: Implement PRCI model for FU540 2019-09-17 08:42:47 -07:00
sifive_u.c riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes 2019-09-17 08:42:48 -07:00
sifive_uart.c riscv: hw: Remove the unnecessary include of target/riscv/cpu.h 2019-09-17 08:42:45 -07:00
spike.c riscv: hw: Remove superfluous "linux, phandle" property 2019-09-17 08:42:44 -07:00
trace-events SiFive RISC-V GPIO Device 2019-05-24 11:58:30 -07:00
virt.c riscv: hw: Change create_fdt() to return void 2019-09-17 08:42:45 -07:00