qemu/target
Alex Bennée a4c2735f35 cpu: move Qemu[Thread|Cond] setup into common code
Aside from the round robin threads this is all common code. By
moving the halt_cond setup we also no longer need hacks to work around
the race between QOM object creation and thread creation.

It is a little ugly to free stuff up for the round robin thread but
better it deal with its own specialises than making the other
accelerators jump through hoops.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240530194250.1801701-3-alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-06-04 10:02:39 +02:00
..
alpha
arm target/arm: Replace sprintf() by snprintf() 2024-06-04 10:02:39 +02:00
avr
cris
hexagon
hppa target/hppa: 2024-05-15 11:46:58 +02:00
i386 cpu: move Qemu[Thread|Cond] setup into common code 2024-06-04 10:02:39 +02:00
loongarch target/loongarch: Add loongarch vector property unconditionally 2024-05-23 09:30:41 +08:00
m68k
microblaze
mips target/mips: Remove unused 'hw/misc/mips_itu.h' header 2024-06-04 10:02:39 +02:00
openrisc
ppc target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot() 2024-05-24 09:43:14 +10:00
riscv target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu 2024-06-04 10:02:39 +02:00
rx
s390x target/s390x: Adjust check of noreturn in translate_one 2024-05-29 12:41:56 +02:00
sh4
sparc
tricore
xtensa target/xtensa: Use translator_ldub in xtensa_insn_len 2024-05-15 08:55:19 +02:00
Kconfig
meson.build