qemu/target/hppa
Richard Henderson 7f221b0706 target/hppa: Adjust insn mask for mfctl,w
While the E bit is only used for pa2.0 mfctl,w from sar,
the otherwise reserved bit does not appear to be decoded.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
..
cpu-qom.h
cpu.c target/hppa: Implement mmu_idx from IA privilege level 2018-01-30 10:08:18 -08:00
cpu.h target/hppa: Add control registers 2018-01-30 10:08:18 -08:00
gdbstub.c target/hppa: Add control registers 2018-01-30 10:08:18 -08:00
helper.c target/hppa: Add space registers 2018-01-30 10:08:18 -08:00
helper.h target/hppa: Implement the system mask instructions 2018-01-30 10:08:18 -08:00
Makefile.objs target/hppa: Skeleton support for hppa-softmmu 2018-01-30 10:08:18 -08:00
mem_helper.c target/hppa: Add control registers 2018-01-30 10:08:18 -08:00
op_helper.c target/hppa: Implement the system mask instructions 2018-01-30 10:08:18 -08:00
translate.c target/hppa: Adjust insn mask for mfctl,w 2018-01-30 10:08:18 -08:00