qemu/target/arm
Thomas Roth 7e3f122367 target/arm: v8m: Ensure IDAU is respected if SAU is disabled
The current behavior of v8m_security_lookup in helper.c only checks whether the
IDAU specifies a higher security if the SAU is enabled. If SAU.ALLNS is set to
1, this will lead to addresses being treated as non-secure, even though the
IDAU indicates that they must be secure.

This patch changes the behavior to also check the IDAU if the SAU is currently
disabled.

(This brings the behaviour here into line with the v8M Arm ARM
SecurityCheck() pseudocode.)

Signed-off-by: Thomas Roth <code@stacksmashing.net>
Message-id: CAGGekkuc+-tvp5RJP7CM+Jy_hJF7eiRHZ96132sb=hPPCappKg@mail.gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: added pseudocode ref to the commit message, fixed comment style]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-29 11:46:03 +00:00
..
arch_dump.c
arm_ldst.h
arm-powerctl.c target-arm: powerctl: Enable HVC when starting CPUs to EL2 2018-10-16 17:14:55 +01:00
arm-powerctl.h
arm-semi.c target/arm: Remove a handful of stray tabs 2018-08-24 13:17:48 +01:00
cpu64.c target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-21 10:38:56 +00:00
cpu-qom.h arm: replace instance_post_init() 2019-01-07 16:18:42 +04:00
cpu.c target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 2019-01-21 10:38:56 +00:00
cpu.h target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER 2019-01-21 10:38:56 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target/arm: Add new_pc argument to helper_exception_return 2019-01-21 10:38:53 +00:00
helper-a64.h target/arm: Add new_pc argument to helper_exception_return 2019-01-21 10:38:53 +00:00
helper-sve.h target/arm: Rewrite vector gather first-fault loads 2018-10-08 14:55:03 +01:00
helper.c target/arm: v8m: Ensure IDAU is respected if SAU is disabled 2019-01-29 11:46:03 +00:00
helper.h target/arm: Move helper_exception_return to helper-a64.c 2019-01-21 10:38:53 +00:00
idau.h qom: make interface types abstract 2018-12-11 15:45:22 -02:00
internals.h target/arm: Decode TBID from TCR 2019-01-21 10:38:54 +00:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-24 13:17:48 +01:00
kvm32.c target/arm: Fill in ARMISARegisters for kvm32 2018-11-19 15:29:08 +00:00
kvm64.c target/arm: Move id_aa64mmfr* to ARMISARegisters 2018-12-13 14:40:56 +00:00
kvm_arm.h target/arm: Install ARMISARegisters from kvm host 2018-11-19 15:29:07 +00:00
kvm-consts.h
kvm-stub.c
kvm.c qemu/queue.h: leave head structs anonymous unless necessary 2019-01-11 15:46:55 +01:00
machine.c target/arm: Swap PMU values before/after migrations 2019-01-21 10:38:55 +00:00
Makefile.objs target/arm: Add PAuth helpers 2019-01-21 10:38:53 +00:00
monitor.c
neon_helper.c
op_addsub.h
op_helper.c target/arm: Move helper_exception_return to helper-a64.c 2019-01-21 10:38:53 +00:00
pauth_helper.c target/arm: Implement pauth_computepac 2019-01-21 10:38:55 +00:00
psci.c
sve_helper.c target/arm/sve_helper: Fix compilation with clang 3.4 2018-11-28 15:31:15 +00:00
sve.decode target/arm: SVE brk[ab] merging does not have s bit 2019-01-07 15:23:45 +00:00
trace-events
translate-a64.c target/arm: Tidy TBI handling in gen_a64_set_pc 2019-01-21 10:38:55 +00:00
translate-a64.h target/arm: Extend vec_reg_offset to larger sizes 2018-06-15 15:23:34 +01:00
translate-sve.c decodetree: Remove "insn" argument from trans_* expanders 2018-10-31 16:48:54 +00:00
translate.c target/arm: Emit barriers for A32/T32 load-acquire/store-release insns 2019-01-07 15:23:48 +00:00
translate.h target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII 2019-01-21 10:38:54 +00:00
vec_helper.c target/arm: Implement SVE dot product (indexed) 2018-06-29 15:11:15 +01:00