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7d6f01a12b
qemu/target/mips
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Philippe Mathieu-Daudé 7d6f01a12b target/mips: Allow executing MSA instructions on Loongson-3A4000 
The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html

Commit af868995e1 correctly set the 'MSA present' bit of Config3
register, but forgot to allow the MSA instructions decoding in
insn_flags, so executing them triggers a 'Reserved Instruction'.

Fix by adding the ASE_MSA mask to insn_flags.

Fixes: af868995e1 ("target/mips: Add Loongson-3 CPU definition")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201130102228.2395100-1-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
..
cp0_helper.c target/mips: Remove unused headers from cp0_helper.c 2020-12-13 19:58:54 +01:00
cp0_timer.c target/mips: Move cp0_count_ns to CPUMIPSState 2020-10-17 11:13:15 +02:00
cpu-param.h target/mips: Support variable page size 2020-06-01 13:28:21 +02:00
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu.c target/mips/cpu: Display warning when CPU is used without input clock 2020-10-17 13:59:40 +02:00
cpu.h target/mips: Fix PageMask with variable page size 2020-11-09 00:31:49 +01:00
dsp_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
fpu_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
gdbstub.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
helper.c target/mips: Also display exception names in user-mode 2020-12-13 19:58:54 +01:00
helper.h target/mips: msa: Split helpers for MULV.<B|H|W|D> 2020-06-15 20:51:04 +02:00
internal.h target/mips: Include "exec/memattrs.h" in 'internal.h' 2020-12-13 19:58:54 +01:00
kvm_mips.h hw/mips: Implement the kvm_type() hook in MachineClass 2020-06-27 19:35:39 +02:00
kvm.c target/mips: Include "exec/memattrs.h" in 'internal.h' 2020-12-13 19:58:54 +01:00
lmmi_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
machine.c target/mips: Add more CP0 register for save/restore 2020-06-01 13:28:21 +02:00
meson.build target/mips: Do not include CP0 helpers in user-mode emulation 2020-12-13 19:58:54 +01:00
mips-defs.h target/mips: Add comments for vendor-specific ASEs 2020-06-15 20:33:16 +02:00
mips-semi.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
msa_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
op_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
TODO Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate_init.c.inc target/mips: Allow executing MSA instructions on Loongson-3A4000 2020-12-13 19:58:54 +01:00
translate.c target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 2020-11-03 16:51:13 +01:00