Taylor Simpson 523e45ac5b Hexagon: lldb read/write predicate registers p0/p1/p2/p3 ... hexagon-core.xml only exposes register p3_0 which is an alias that aggregates the predicate registers. It is more convenient for users to interact directly with the predicate registers. Tested with lldb downloaded from this location https://github.com/llvm/llvm-project/releases/download/llvmorg-18.1.4/clang+llvm-18.1.4-x86_64-linux-gnu-ubuntu-18.04.tar.xz BEFORE: (lldb) reg read p3_0 p3_0 = 0x00000000 (lldb) reg read p0 error: Invalid register name 'p0'. (lldb) reg write p1 0xf error: Register not found for 'p1'. AFTER: (lldb) reg read p3_0 p3_0 = 0x00000000 (lldb) reg read p0 p0 = 0x00 (lldb) reg read -s 1 Predicate Registers: p0 = 0x00 p1 = 0x00 p2 = 0x00 p3 = 0x00 (lldb) reg write p1 0xf (lldb) reg read p3_0 p3_0 = 0x00000f00 (lldb) reg write p3_0 0xff00ff00 (lldb) reg read -s 1 Predicate Registers: p0 = 0x00 p1 = 0xff p2 = 0x00 p3 = 0xff Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Reviewed-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Message-Id: <20240613182209.140082-1-ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>		2024-08-07 20:34:41 -07:00
..
aarch64-core.xml
aarch64-fpu.xml
aarch64-mte.xml	gdbstub: Add support for MTE in user mode	2024-07-05 12:35:33 +01:00
aarch64-pauth.xml	target/arm: Report pauth information to gdb as 'pauth_v2'	2023-04-20 10:21:16 +01:00
arm-core.xml
arm-m-profile-mve.xml
arm-m-profile.xml
arm-neon.xml	gdb-xml: fix duplicate register in arm-neon.xml	2023-11-08 15:15:23 +00:00
arm-vfp3.xml
arm-vfp-sysregs.xml
arm-vfp.xml
avr-cpu.xml
cf-core.xml
cf-fp.xml
hexagon-core.xml	Hexagon: lldb read/write predicate registers p0/p1/p2/p3	2024-08-07 20:34:41 -07:00
hexagon-hvx.xml	Hexagon (gdbstub): add HVX support	2023-05-18 12:40:52 -07:00
i386-32bit.xml	gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB	2022-11-06 09:48:26 +01:00
i386-64bit.xml
loongarch-base32.xml	target/loongarch: Add GDB support for loongarch32 mode	2023-08-24 11:17:56 +08:00
loongarch-base64.xml	target/loongarch: update loongarch-base64.xml	2022-08-05 10:02:40 -07:00
loongarch-fpu.xml	target/loongarch: Split fcc register to fcc0-7 in gdbstub	2023-08-24 11:17:59 +08:00
loongarch-lasx.xml	target/loongarch/gdbstub: Add vector registers support	2024-07-19 10:40:04 +08:00
loongarch-lsx.xml	target/loongarch/gdbstub: Add vector registers support	2024-07-19 10:40:04 +08:00
m68k-core.xml
m68k-fp.xml
microblaze-core.xml	target/microblaze: Add gdbstub xml	2023-02-21 08:52:17 -10:00
microblaze-stack-protect.xml	target/microblaze: Add gdbstub xml	2023-02-21 08:52:17 -10:00
power64-core.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
riscv-32bit-cpu.xml	target/riscv: remove fixed numbering from GDB xml feature files	2022-09-27 07:04:38 +10:00
riscv-32bit-fpu.xml	target/riscv: remove fixed numbering from GDB xml feature files	2022-09-27 07:04:38 +10:00
riscv-32bit-virtual.xml
riscv-64bit-cpu.xml	target/riscv: remove fixed numbering from GDB xml feature files	2022-09-27 07:04:38 +10:00
riscv-64bit-fpu.xml	target/riscv: remove fixed numbering from GDB xml feature files	2022-09-27 07:04:38 +10:00
riscv-64bit-virtual.xml
rx-core.xml
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml
s390-virt-kvm.xml	s390x/gdb: Split s390-virt.xml	2023-04-28 08:05:37 +02:00
s390-virt.xml	s390x/gdb: Split s390-virt.xml	2023-04-28 08:05:37 +02:00
s390-vx.xml
s390x-core64.xml