qemu/hw/ssi
Chalapathi V bb44dc4862 hw/ppc: SPI controller wiring to P10 chip
In this commit, create SPI controller on p10 chip and connect cs irq.

The QOM tree of pnv-spi and seeprom are.
/machine (powernv10-machine)
  /chip[0] (power10_v2.0-pnv-chip)
    /pib_spic[2] (pnv-spi)
      /pnv-spi-bus.2 (SSI)
      /xscom-spi[0] (memory-region)

/machine (powernv10-machine)
  /peripheral-anon (container)
    /device[0] (25csm04)
      /WP#[0] (irq)
      /ssi-gpio-cs[0] (irq)

(qemu) qom-get /machine/peripheral-anon /device[76] "parent_bus"
"/machine/chip[0]/pib_spic[2]/pnv-spi-bus.2"

Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-07-26 09:21:06 +10:00
..
aspeed_smc.c
bcm2835_spi.c
ibex_spi_host.c
imx_spi.c
Kconfig
meson.build
mss-spi.c
npcm7xx_fiu.c
npcm_pspi.c
omap_spi.c
pl022.c
pnv_spi.c hw/ppc: SPI controller wiring to P10 chip 2024-07-26 09:21:06 +10:00
sifive_spi.c
ssi.c
stm32f2xx_spi.c
trace-events
trace.h
xilinx_spi.c
xilinx_spips.c
xlnx-versal-ospi.c