eed52398f5
Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
465 lines
15 KiB
C
465 lines
15 KiB
C
/*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2019 Red Hat, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "qapi/qapi-visit-common.h"
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#include "qapi/qapi-visit-machine.h"
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#include "qapi/visitor.h"
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#include "sysemu/qtest.h"
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#include "sysemu/numa.h"
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#include "trace.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/i386/x86.h"
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#include "hw/i386/topology.h"
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#include "hw/nmi.h"
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#include "kvm/kvm_i386.h"
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void init_topo_info(X86CPUTopoInfo *topo_info,
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const X86MachineState *x86ms)
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{
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MachineState *ms = MACHINE(x86ms);
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topo_info->dies_per_pkg = ms->smp.dies;
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/*
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* Though smp.modules means the number of modules in one cluster,
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* i386 doesn't support cluster level so that the smp.clusters
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* always defaults to 1, therefore using smp.modules directly is
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* fine here.
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*/
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topo_info->modules_per_die = ms->smp.modules;
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topo_info->cores_per_module = ms->smp.cores;
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topo_info->threads_per_core = ms->smp.threads;
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}
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/*
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* Calculates initial APIC ID for a specific CPU index
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*
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* Currently we need to be able to calculate the APIC ID from the CPU index
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* alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
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* no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
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* all CPUs up to max_cpus.
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*/
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uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
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unsigned int cpu_index)
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{
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X86CPUTopoInfo topo_info;
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init_topo_info(&topo_info, x86ms);
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return x86_apicid_from_cpu_idx(&topo_info, cpu_index);
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}
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static CpuInstanceProperties
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x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
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{
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MachineClass *mc = MACHINE_GET_CLASS(ms);
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const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
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assert(cpu_index < possible_cpus->len);
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return possible_cpus->cpus[cpu_index].props;
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}
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static int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
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{
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X86CPUTopoIDs topo_ids;
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X86MachineState *x86ms = X86_MACHINE(ms);
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X86CPUTopoInfo topo_info;
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init_topo_info(&topo_info, x86ms);
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assert(idx < ms->possible_cpus->len);
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x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
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&topo_info, &topo_ids);
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return topo_ids.pkg_id % ms->numa_state->num_nodes;
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}
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static const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
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{
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X86MachineState *x86ms = X86_MACHINE(ms);
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unsigned int max_cpus = ms->smp.max_cpus;
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X86CPUTopoInfo topo_info;
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int i;
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if (ms->possible_cpus) {
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/*
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* make sure that max_cpus hasn't changed since the first use, i.e.
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* -smp hasn't been parsed after it
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*/
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assert(ms->possible_cpus->len == max_cpus);
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return ms->possible_cpus;
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}
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ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
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sizeof(CPUArchId) * max_cpus);
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ms->possible_cpus->len = max_cpus;
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init_topo_info(&topo_info, x86ms);
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for (i = 0; i < ms->possible_cpus->len; i++) {
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X86CPUTopoIDs topo_ids;
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ms->possible_cpus->cpus[i].type = ms->cpu_type;
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ms->possible_cpus->cpus[i].vcpus_count = 1;
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ms->possible_cpus->cpus[i].arch_id =
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x86_cpu_apic_id_from_index(x86ms, i);
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x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
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&topo_info, &topo_ids);
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ms->possible_cpus->cpus[i].props.has_socket_id = true;
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ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
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if (ms->smp.dies > 1) {
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ms->possible_cpus->cpus[i].props.has_die_id = true;
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ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id;
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}
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if (ms->smp.modules > 1) {
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ms->possible_cpus->cpus[i].props.has_module_id = true;
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ms->possible_cpus->cpus[i].props.module_id = topo_ids.module_id;
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}
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ms->possible_cpus->cpus[i].props.has_core_id = true;
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ms->possible_cpus->cpus[i].props.core_id = topo_ids.core_id;
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ms->possible_cpus->cpus[i].props.has_thread_id = true;
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ms->possible_cpus->cpus[i].props.thread_id = topo_ids.smt_id;
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}
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return ms->possible_cpus;
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}
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static void x86_nmi(NMIState *n, int cpu_index, Error **errp)
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{
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/* cpu index isn't used */
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CPUState *cs;
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CPU_FOREACH(cs) {
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X86CPU *cpu = X86_CPU(cs);
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if (cpu_is_apic_enabled(cpu->apic_state)) {
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apic_deliver_nmi(cpu->apic_state);
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} else {
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cpu_interrupt(cs, CPU_INTERRUPT_NMI);
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}
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}
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}
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bool x86_machine_is_smm_enabled(const X86MachineState *x86ms)
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{
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bool smm_available = false;
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if (x86ms->smm == ON_OFF_AUTO_OFF) {
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return false;
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}
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if (tcg_enabled() || qtest_enabled()) {
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smm_available = true;
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} else if (kvm_enabled()) {
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smm_available = kvm_has_smm();
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}
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if (smm_available) {
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return true;
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}
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if (x86ms->smm == ON_OFF_AUTO_ON) {
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error_report("System Management Mode not supported by this hypervisor.");
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exit(1);
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}
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return false;
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}
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static void x86_machine_get_smm(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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OnOffAuto smm = x86ms->smm;
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visit_type_OnOffAuto(v, name, &smm, errp);
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}
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static void x86_machine_set_smm(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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visit_type_OnOffAuto(v, name, &x86ms->smm, errp);
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}
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bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms)
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{
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if (x86ms->acpi == ON_OFF_AUTO_OFF) {
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return false;
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}
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return true;
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}
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static void x86_machine_get_acpi(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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OnOffAuto acpi = x86ms->acpi;
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visit_type_OnOffAuto(v, name, &acpi, errp);
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}
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static void x86_machine_set_acpi(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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visit_type_OnOffAuto(v, name, &x86ms->acpi, errp);
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}
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static void x86_machine_get_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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OnOffAuto pit = x86ms->pit;
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visit_type_OnOffAuto(v, name, &pit, errp);
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}
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static void x86_machine_set_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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visit_type_OnOffAuto(v, name, &x86ms->pit, errp);
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}
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static void x86_machine_get_pic(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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OnOffAuto pic = x86ms->pic;
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visit_type_OnOffAuto(v, name, &pic, errp);
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}
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static void x86_machine_set_pic(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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visit_type_OnOffAuto(v, name, &x86ms->pic, errp);
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}
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static char *x86_machine_get_oem_id(Object *obj, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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return g_strdup(x86ms->oem_id);
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}
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static void x86_machine_set_oem_id(Object *obj, const char *value, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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size_t len = strlen(value);
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if (len > 6) {
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error_setg(errp,
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"User specified "X86_MACHINE_OEM_ID" value is bigger than "
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"6 bytes in size");
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return;
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}
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strncpy(x86ms->oem_id, value, 6);
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}
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static char *x86_machine_get_oem_table_id(Object *obj, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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return g_strdup(x86ms->oem_table_id);
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}
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static void x86_machine_set_oem_table_id(Object *obj, const char *value,
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Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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size_t len = strlen(value);
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if (len > 8) {
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error_setg(errp,
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"User specified "X86_MACHINE_OEM_TABLE_ID
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" value is bigger than "
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"8 bytes in size");
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return;
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}
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strncpy(x86ms->oem_table_id, value, 8);
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}
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static void x86_machine_get_bus_lock_ratelimit(Object *obj, Visitor *v,
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const char *name, void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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uint64_t bus_lock_ratelimit = x86ms->bus_lock_ratelimit;
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visit_type_uint64(v, name, &bus_lock_ratelimit, errp);
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}
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static void x86_machine_set_bus_lock_ratelimit(Object *obj, Visitor *v,
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const char *name, void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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visit_type_uint64(v, name, &x86ms->bus_lock_ratelimit, errp);
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}
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static void machine_get_sgx_epc(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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SgxEPCList *list = x86ms->sgx_epc_list;
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visit_type_SgxEPCList(v, name, &list, errp);
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}
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static void machine_set_sgx_epc(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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SgxEPCList *list;
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list = x86ms->sgx_epc_list;
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visit_type_SgxEPCList(v, name, &x86ms->sgx_epc_list, errp);
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qapi_free_SgxEPCList(list);
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}
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static int x86_kvm_type(MachineState *ms, const char *vm_type)
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{
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/*
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* No x86 machine has a kvm-type property. If one is added that has
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* it, it should call kvm_get_vm_type() directly or not use it at all.
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*/
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assert(vm_type == NULL);
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return kvm_enabled() ? kvm_get_vm_type(ms) : 0;
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}
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static void x86_machine_initfn(Object *obj)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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x86ms->smm = ON_OFF_AUTO_AUTO;
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x86ms->acpi = ON_OFF_AUTO_AUTO;
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x86ms->pit = ON_OFF_AUTO_AUTO;
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x86ms->pic = ON_OFF_AUTO_AUTO;
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x86ms->pci_irq_mask = ACPI_BUILD_PCI_IRQS;
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x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
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x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
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x86ms->bus_lock_ratelimit = 0;
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x86ms->above_4g_mem_start = 4 * GiB;
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}
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static void x86_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
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NMIClass *nc = NMI_CLASS(oc);
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mc->cpu_index_to_instance_props = x86_cpu_index_to_props;
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mc->get_default_cpu_node_id = x86_get_default_cpu_node_id;
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mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids;
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mc->kvm_type = x86_kvm_type;
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x86mc->save_tsc_khz = true;
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x86mc->fwcfg_dma_enabled = true;
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nc->nmi_monitor_handler = x86_nmi;
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object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto",
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x86_machine_get_smm, x86_machine_set_smm,
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NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_SMM,
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"Enable SMM");
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object_class_property_add(oc, X86_MACHINE_ACPI, "OnOffAuto",
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x86_machine_get_acpi, x86_machine_set_acpi,
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NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_ACPI,
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"Enable ACPI");
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object_class_property_add(oc, X86_MACHINE_PIT, "OnOffAuto",
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x86_machine_get_pit,
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x86_machine_set_pit,
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NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_PIT,
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"Enable i8254 PIT");
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object_class_property_add(oc, X86_MACHINE_PIC, "OnOffAuto",
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x86_machine_get_pic,
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x86_machine_set_pic,
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NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_PIC,
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"Enable i8259 PIC");
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object_class_property_add_str(oc, X86_MACHINE_OEM_ID,
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x86_machine_get_oem_id,
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x86_machine_set_oem_id);
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object_class_property_set_description(oc, X86_MACHINE_OEM_ID,
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"Override the default value of field OEMID "
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"in ACPI table header."
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"The string may be up to 6 bytes in size");
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object_class_property_add_str(oc, X86_MACHINE_OEM_TABLE_ID,
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x86_machine_get_oem_table_id,
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x86_machine_set_oem_table_id);
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object_class_property_set_description(oc, X86_MACHINE_OEM_TABLE_ID,
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"Override the default value of field OEM Table ID "
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"in ACPI table header."
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"The string may be up to 8 bytes in size");
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object_class_property_add(oc, X86_MACHINE_BUS_LOCK_RATELIMIT, "uint64_t",
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x86_machine_get_bus_lock_ratelimit,
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x86_machine_set_bus_lock_ratelimit, NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_BUS_LOCK_RATELIMIT,
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"Set the ratelimit for the bus locks acquired in VMs");
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object_class_property_add(oc, "sgx-epc", "SgxEPC",
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machine_get_sgx_epc, machine_set_sgx_epc,
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NULL, NULL);
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object_class_property_set_description(oc, "sgx-epc",
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"SGX EPC device");
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}
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static const TypeInfo x86_machine_info = {
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.name = TYPE_X86_MACHINE,
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.parent = TYPE_MACHINE,
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.abstract = true,
|
|
.instance_size = sizeof(X86MachineState),
|
|
.instance_init = x86_machine_initfn,
|
|
.class_size = sizeof(X86MachineClass),
|
|
.class_init = x86_machine_class_init,
|
|
.interfaces = (InterfaceInfo[]) {
|
|
{ TYPE_NMI },
|
|
{ }
|
|
},
|
|
};
|
|
|
|
static void x86_machine_register_types(void)
|
|
{
|
|
type_register_static(&x86_machine_info);
|
|
}
|
|
|
|
type_init(x86_machine_register_types)
|