qemu/target/riscv/insn_trans
Frank Chang 79e6176ea0 target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing fp/int type-convert insns
vfncvt.f.xu.w, vfncvt.f.x.w convert double-width integer to single-width
floating-point. Therefore, should use require_rvf() to check whether
RVF/RVD is enabled.

vfncvt.f.f.w, vfncvt.rod.f.f.w convert double-width floating-point to
single-width integer. Therefore, should use require_scale_rvf() to check
whether RVF/RVD is enabled.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220105022247.21131-4-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-08 15:46:09 +10:00
..
trans_privileged.c.inc target/riscv: Remove exit_tb and lookup_and_goto_ptr 2021-10-15 16:39:14 -07:00
trans_rva.c.inc target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions 2021-10-28 14:39:23 +10:00
trans_rvb.c.inc target/riscv: Use gen_shift*_per_ol for RVB, RVI 2021-10-22 23:35:47 +10:00
trans_rvd.c.inc target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions 2021-10-28 14:39:23 +10:00
trans_rvf.c.inc target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions 2021-10-28 14:39:23 +10:00
trans_rvh.c.inc target/riscv: Tidy trans_rvh.c.inc 2021-09-01 11:59:12 +10:00
trans_rvi.c.inc target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions 2021-10-28 14:39:23 +10:00
trans_rvm.c.inc target/riscv: Use gen_arith_per_ol for RVM 2021-10-22 23:35:43 +10:00
trans_rvv.c.inc target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing fp/int type-convert insns 2022-01-08 15:46:09 +10:00
trans_rvzfh.c.inc target/riscv: zfh: implement zfhmin extension 2021-12-20 14:51:36 +10:00