Max Filippov 797d780b13 target-xtensa: implement loop option ... See ISA, 4.3.2 for details. Operations that change LEND SR value invalidate TBs at the old and at the new LEND. LEND value at TB compilation time is considered constant and loop instruction is generated based on this value. Invalidation may be avoided for the TB at the old LEND address, since looping code verifies actual LEND value. Invalidation may be avoided for the TB at the new LEND address if there's a way to associate LEND address with TB at compilation time and later verify that it doesn't change. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>		2011-09-10 16:57:39 +00:00
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cpu.h	target-xtensa: implement loop option	2011-09-10 16:57:39 +00:00
helper.c	target-xtensa: implement windowed registers	2011-09-10 16:57:39 +00:00
helpers.h	target-xtensa: implement loop option	2011-09-10 16:57:39 +00:00
machine.c	target-xtensa: add target stubs	2011-09-10 16:57:36 +00:00
op_helper.c	target-xtensa: implement loop option	2011-09-10 16:57:39 +00:00
translate.c	target-xtensa: implement loop option	2011-09-10 16:57:39 +00:00