qemu/target/microblaze
Edgar E. Iglesias 79549c9960 target-microblaze: Correct bit shift for the PVR0 version field
Correct bit shift for the PVR0 version field.

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2017-07-04 09:22:20 +02:00
..
cpu-qom.h
cpu.c target-microblaze: Correct bit shift for the PVR0 version field 2017-07-04 09:22:20 +02:00
cpu.h target-microblaze: Correct bit shift for the PVR0 version field 2017-07-04 09:22:20 +02:00
gdbstub.c
helper.c
helper.h target-microblaze: Use clz opcode 2017-01-10 08:06:11 -08:00
Makefile.objs
microblaze-decode.h
mmu.c cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mmu.h
op_helper.c target-microblaze: Use clz opcode 2017-01-10 08:06:11 -08:00
translate.c target-microblaze: Use clz opcode 2017-01-10 08:06:11 -08:00