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Peter Maydell c94bee4cd6 * target/i386: new feature bits for AMD processors 
* target/i386/tcg: improvements around flag handling
 * target/i386: add AVX10 support
 * target/i386: add GraniteRapids-v2 model
 * dockerfiles: add libcbor
 * New nitro-enclave machine type
 * qom: cleanups to object_new
 * configure: detect 64-bit MIPS for rust
 * configure: deprecate 32-bit MIPS
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Merge tag 'for-upstream-i386' of https://gitlab.com/bonzini/qemu into staging

* target/i386: new feature bits for AMD processors
* target/i386/tcg: improvements around flag handling
* target/i386: add AVX10 support
* target/i386: add GraniteRapids-v2 model
* dockerfiles: add libcbor
* New nitro-enclave machine type
* qom: cleanups to object_new
* configure: detect 64-bit MIPS for rust
* configure: deprecate 32-bit MIPS

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# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
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# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
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* tag 'for-upstream-i386' of https://gitlab.com/bonzini/qemu: (49 commits)
  target/i386: Introduce GraniteRapids-v2 model
  target/i386: Add AVX512 state when AVX10 is supported
  target/i386: Add feature dependencies for AVX10
  target/i386: add CPUID.24 features for AVX10
  target/i386: add AVX10 feature and AVX10 version property
  target/i386: return bool from x86_cpu_filter_features
  target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits
  target/i386: cpu: set correct supported XCR0 features for TCG
  target/i386: use + to put flags together
  target/i386: use higher-precision arithmetic to compute CF
  target/i386: use compiler builtin to compute PF
  target/i386: make flag variables unsigned
  target/i386: add a note about gen_jcc1
  target/i386: add a few more trivial CCPrepare cases
  target/i386: optimize TEST+Jxx sequences
  target/i386: optimize computation of ZF from CC_OP_DYNAMIC
  target/i386: Wrap cc_op_live with a validity check
  target/i386: Introduce cc_op_size
  target/i386: Rearrange CCOp
  target/i386: remove CC_OP_CLR
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-02 16:21:38 +00:00
..
alpha target/alpha: Use explicit little-endian LD/ST API 2024-10-15 11:55:09 -03:00
arm target/arm: kvm: require KVM_CAP_DEVICE_CTRL 2024-10-29 15:04:47 +00:00
avr target/avr: Use explicit little-endian LD/ST API 2024-10-15 12:13:59 -03:00
hexagon target/hexagon: Use explicit little-endian LD/ST API 2024-10-15 11:55:09 -03:00
hppa target/hppa: Implement TCGCPUOps.tlb_fill_align 2024-10-13 11:27:05 -07:00
i386 target/i386: Introduce GraniteRapids-v2 model 2024-10-31 18:28:33 +01:00
loongarch pull-loongarch-20241016 2024-10-17 12:42:23 +01:00
m68k target/m68k: Always return a temporary from gen_lea_mode 2024-10-08 06:40:31 -07:00
microblaze license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
mips hw/mips: Have mips_cpu_create_with_clock() take an endianness argument 2024-10-15 12:21:06 -03:00
openrisc license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
ppc target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl() 2024-10-15 12:13:59 -03:00
riscv target/riscv: Fix vcompress with rvv_ta_all_1s 2024-10-31 13:51:24 +10:00
rx target/rx: Use target_ulong for address in LI 2024-07-28 14:13:05 +10:00
s390x s390x: Rebuild IPLB for SCSI device directly from DIAG308 2024-10-23 06:53:44 +02:00
sh4 license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
sparc license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later 2024-09-20 10:11:59 +03:00
tricore target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl() 2024-10-15 12:13:59 -03:00
xtensa include/exec/memop: Rename get_alignment_bits 2024-10-13 11:27:03 -07:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00