qemu/target/arm/tcg
Peter Maydell 782781e85d target/arm: Fix generated code for cpreg reads when HSTR is active
In commit 049edada we added some code to handle HSTR_EL2 traps, which
we did as an inline "conditionally branch over a
gen_exception_insn()".  Unfortunately this fails to take account of
the fact that gen_exception_insn() will set s->base.is_jmp to
DISAS_NORETURN.  That means that at the end of the TB we won't
generate the necessary code to handle the "branched over the trap and
continued normal execution" codepath.  The result is that the TCG
main loop thinks that we stopped execution of the TB due to a
situation that only happens when icount is enabled, and hits an
assertion. Explicitly set is_jmp back to DISAS_NEXT so we generate
the correct code for when execution continues past this insn.

Note that this only happens for cpreg reads; writes will call
gen_lookup_tb() which generates a valid end-of-TB.

Fixes: 049edada ("target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1551
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230330101900.2320380-1-peter.maydell@linaro.org
2023-04-03 16:12:30 +01:00
..
a32-uncond.decode
a32.decode
crypto_helper.c
helper-a64.c gdbstub: move register helpers into standalone include 2023-03-07 20:44:08 +00:00
hflags.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
iwmmxt_helper.c
m_helper.c gdbstub: move register helpers into standalone include 2023-03-07 20:44:08 +00:00
m-nocp.decode
meson.build target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
mte_helper.c softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel 2023-03-28 15:24:06 -07:00
mve_helper.c
mve.decode
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_helper.c
pauth_helper.c target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask() 2023-04-03 16:12:29 +01:00
psci.c target/arm: Move psci.c into the tcg directory 2023-02-27 13:27:04 +00:00
sme_helper.c
sme-fa64.decode
sme.decode
sve_helper.c softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel 2023-03-28 15:24:06 -07:00
sve.decode
t16.decode
t32.decode
tlb_helper.c target/arm: Move regime_using_lpae_format into internal.h 2023-02-27 13:27:04 +00:00
translate-a64.c target/arm: Avoid tcg_const_ptr in handle_rev 2023-03-13 07:03:39 -07:00
translate-a64.h target/arm: Drop new_tmp_a64_zero 2023-03-05 13:44:07 -08:00
translate-m-nocp.c target/arm: Drop tcg_temp_free from translator-m-nocp.c 2023-03-05 13:44:07 -08:00
translate-mve.c target/arm: Avoid tcg_const_* in translate-mve.c 2023-03-13 07:03:39 -07:00
translate-neon.c target/arm: Drop tcg_temp_free from translator-neon.c 2023-03-05 13:44:07 -08:00
translate-sme.c target/arm: Drop tcg_temp_free from translator-sme.c 2023-03-05 13:44:07 -08:00
translate-sve.c target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} 2023-03-13 07:03:39 -07:00
translate-vfp.c target/arm: Create gen_set_rmode, gen_restore_rmode 2023-03-13 06:44:38 -07:00
translate.c target/arm: Fix generated code for cpreg reads when HSTR is active 2023-04-03 16:12:30 +01:00
translate.h target/arm: Create gen_set_rmode, gen_restore_rmode 2023-03-13 06:44:38 -07:00
vec_helper.c
vec_internal.h
vfp-uncond.decode
vfp.decode