Anton Blanchard 77bd8937c0 target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p ... We were using set_cpu_vsr*() when we should have used get_cpu_vsr*(). Fixes: 8b3b2d75c7 ("introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for VSR register access") Signed-off-by: Anton Blanchard <anton@ozlabs.org> Message-Id: <20190509104912.6b754dff@kryten> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2019-05-29 11:39:45 +10:00
..
dfp-impl.inc.c	target/ppc: move FP and VMX registers into aligned vsr register array	2019-01-09 09:28:14 +11:00
dfp-ops.inc.c
fp-impl.inc.c	target/ppc: Style fixes for translate/fp-impl.inc.c	2019-04-26 11:37:57 +10:00
fp-ops.inc.c	target/ppc: add external PID support	2018-11-08 12:04:40 +11:00
spe-impl.inc.c	target/ppc: Use tcg_gen_abs_i32	2019-05-13 22:52:08 +00:00
spe-ops.inc.c
vmx-impl.inc.c	tcg: Specify optional vector requirements with a list	2019-05-13 14:44:03 -07:00
vmx-ops.inc.c	Changes requirement for "vsubsbs" instruction	2018-12-21 09:29:12 +11:00
vsx-impl.inc.c	target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p	2019-05-29 11:39:45 +10:00
vsx-ops.inc.c	target-ppc: Add xscvqpudz and xscvqpuwz instructions	2017-02-22 11:28:28 +11:00