24bd283bcc
One of the functions of the ADU is indirect memory access engines that send and receive data via ADU registers. This implements the ADU LPC memory access functionality sufficiently for IBM proprietary firmware to access the UART and print characters to the serial port as it does on real hardware. This requires a linkage between adu and lpc, which allows adu to perform memory access in the lpc space. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
33 lines
633 B
C
33 lines
633 B
C
/*
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* QEMU PowerPC PowerNV Emulation of some ADU behaviour
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*
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* Copyright (c) 2024, IBM Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef PPC_PNV_ADU_H
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#define PPC_PNV_ADU_H
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#include "hw/ppc/pnv.h"
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#include "hw/ppc/pnv_lpc.h"
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#include "hw/qdev-core.h"
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#define TYPE_PNV_ADU "pnv-adu"
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OBJECT_DECLARE_TYPE(PnvADU, PnvADUClass, PNV_ADU)
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struct PnvADU {
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DeviceState xd;
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/* LPCMC (LPC Master Controller) access engine */
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PnvLpcController *lpc;
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uint64_t lpc_base_reg;
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uint64_t lpc_cmd_reg;
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uint64_t lpc_data_reg;
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MemoryRegion xscom_regs;
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};
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#endif /* PPC_PNV_ADU_H */
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